Progetto SHIP Relazione dei referee Roma, 2 giugno 2015 · 2020. 3. 11. · Goal of the Silicon...

Sezione di MilanoDIPARTIMENTO DI FISICA

Silicon/Vertex DetectorRD_FA Referee Meeting

11 marzo 2020

Attilio Andreazza (MI)

Per il work-package on silicon detectors

Goal of the Silicon tracking WP

Vidyo, 11 marzo 2020 RD_FA: Silicon detectors 2

• Provide high-precision tracking for future e+e- colliders:– High resolution pixel vertex detector

– Central gas chamber + Si wrapper(same technologies can be used for a full silicon tracker)

High precision measurement at end of tracking volume

Finely segmented vertex detector

Challenging requirements on detector

material

Challenging requirements on detector

material

O(100 m2)

O(few m2)

The IDEA Detector layout


• Beam pipe (R~1.5 cm)

• VTX: – 4-7 Depleted MAPS layers

– Acceptance: θ>150 mrad

• DCH: 4 m long, R 35-200 cm

• Outer Silicon Layer

• SC Coil : 2 T, R ~2.1 m

• Preshower: ~1 X0

• Dual Readout calorimeter: 2 m/7 lint

– Acceptance: θ>100 mrad

• Yoke + muon chamber 1.0 2.0 3.0 4.0 5.0 z [m]

1.0

2.0

3.0

4

.0

5.0

r [

m]

Technologies under investigation• Exploring CMOS technologies, since they have the potential for

low cost/high throughput

• VTX: Depleted Monolithic Active Pixels– Fast signal

– Possibility for very thin detectors (low material)

– Small pitches already realized

– CSN5 developments: SEED-ARCADIA

• One AIDA++ EoI accepted

• Outer tracker: – Proposing to use DMAPS also for large area detectors:

• First steps together with KIT, Liverpool, Lancaster, Edinburgh.

• Use existing ATLASPIX3 chip

– Considering also “passive CMOS” sensor:• productions by ATLAS/CMS delivered in January

• Includes both strips and hybrid pixels


Currently funded by CSN5Call 2019-2021

Small requests this year

ARCADIA (INFN CSN5 Call Project)

Advanced Readout CMOS Architectures with Depleted Integrated sensor Arrays

• Call 2019-2021

• Sezioni: Bologna, Milano, Padova, Perugia, Pavia, TIFPA, Torino

• 48 persone, 13.5 FTE in 2020

• Development in LFoundry 110 nm technology node

• AIDAinnova participation, with contribution from:

– PSI, ETH Zurich, University of Zurich

– Oxford

– IHEP

• Some highlights from the Winter meeting (Padova 17-18 February)

– Characterization of SEED sensors

– Development of large size prototype and readout architecture

• 1st submission, ARCADIA-MD1, in preparation (tapeout in June 2020)– RD_FA members will be involved in the detector characterization in 2021


SEED→ARCADIA Sensors

SEED • Predecessor of ARCADIA in CSN5

• Demonstrated the sensor technology

• In depth characterization of produced devices


Sensor structures: depletion and charge collectionuniformity measurements at RBI Zagreb

MATISSE:DMAPS prototype

Neutron irradiation planned in Lubljana

TID effect with X-ray in Padova

Laser measurementsIn Torino

ARCADIA-MD1 DesignFirst prototype of the ARCADIA project:• Specifications based on flexibility for

different applications:

– Lepton colliders

– Space applications

– Medical application

• 512×512 pixels → scalable to 2048

• 25×25 μm2 size


Power density 10-20 mW/cm2

Hit rate 100 MHz/cm2

Time resolution 1-10 μs

Binary readout

Triggerless readout

Low multiplicity (Space) Mode Readout

ARCADIA-MD1 Features


Clustering implemented in the matrix: saving bandwitdh and power

Space applications, with low data rate, may reduce power by using only a 1 out 16 output serializers.

Strips for the Outer Tracker• Implement passive structures in standard CMOS processes

on high resistivity substrate

– Alternative fabrication process for standard strip and pixel sensors: “fast and cheap”

– Stitching to build large area sensors

– ATLAS production delivered in January: expect some first test devices in the next weeks


Different pixel types



Metal

Poly

STI

Pwell

Nwell

75.5 um

18 um

N+

P+

Strip layout

2×3 cm2 reticle

DMAPS for the Outer Tracker• The surface of the outer trackers are similar to the current

ATLAS and CMS upgrades:

• Comparing technology costs and performance:

• DMAPs technology are now in the same range of costs and power consumption of microstrips

• A large scale full DMAPS system may become affordable in the next years


CMS Upgrade Double Strips Macropixels+Strips Hybrid Pixels

Area 192 m2 25 m2 4.9 m2

Power density 27 mW/cm2 89 mW/cm2 700 mW/cm2

Module cost

(TDR)

26990 kCHF 20780 kCHF 11691 kCHF

140 kCHF/m2 830 kCHF/m2 2400 kCHF/m2

DMAPS@FCCee

100-200 m2

<40 mW/cm2

400-500 kCHF/m2

From ATLAS R&D: ATLASPIX3


• Original design in AMS 180 nm HV technology now produced with TSI (USA) compatible process

• Sensor radiation hardness verified on several prototypes up to 2×1015 n/cm2

• Full size matrix: 20.2mm x 21mm

• Fit most ATLAS requirements:

– 50×150 μm2 pixel size, large fill factor

– Column drain readout (FE-I3 like)

– Compatible with RD53A serial powering schema and readout protocols

• Received from TSI in summer 2019– High observed yield, operated in lab and DESY testbeams

1015 n/cm2

99.4%

efficiency

(ATLASPIX1)

R. Schimassek @ Hiroshima2019

Multi Chip module


First step towards large systems is the assembly of multi-chip modules.

Activity funded by RD_FA.

Since September:

• Started collaboration with KITand UK groups

• INFN designing the module

• UK taking care of DAQ and interfaces

Multi chip moduleModule design mechanically compatible with ATLAS hybrid pixels

• 4-chips module

• Direct powering+Commanddecoder

• Backup SPI interface

• Now under revision with the chip designers.

If successful, next iteration would be to drop the SPI interface and add serial powering operation:

• another step towards largesystems.


Received preliminary quotation:3100 + TVA for 10 samples

Plans

• The Silicon WP till now is covering application of CMOS technologies and developed without RD_FA funds

– Small request this year to assess multi-chip performance of the detectors developed for ATLAS

• The group is building international collaboration.

• The activity in 2020 is following the expected schedule:

– ARCADIA-MD1 submission in June 2020

– Design of multi-chip ATLASPIX3 module almost completed

– “Passive CMOS” devices available shortly

– Plenty of things to do till the end of the year…


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Progetto SHIP Relazione dei referee Roma, 2 giugno 2015 · 2020. 3. 11. · Goal of the Silicon...

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