Istituto Nazionale di Fisica Nuclearepessina.mib.infn.it/Biblio/Biblio_Articoli/NIMA V A320 p 317...

12
1 These Notes refer to paper NIMA V 320, pp 317 324, 1992. Eq. 4: there is a missing term multiplying 2 2 DT f BB' C C e N + . This is the term: 1 α τ . Namely: ( ) ( ) ( ) ( ) 12 2 2 2 2 2 2 2 1 DT DT D RMS f B T f BB' 2 B f 12 2 2 2 2 2 2 2 1 T BB' DT f B DT f 2 D B f N C C i ENC(e ) C C e C e i i Q N N N e e C NC C C NC i Ni i N N α = + + + + +α τ + + τ α = + + + + +α τ + + τ 1 1 α τ 1 α Q τ Eq. 5: the term multiplying the second line is α 1 instead of α 2 : ( ) ( ) ( ) 12 2 2 2 1 T BB' DT D 2 2 22 2 2 f B T f BB' 2 B f e e C N C C e Ce i i α + τ = + + +α τ + τ 1 α where 2 2 TM T BD e e N = , 2 2 BB'M BB' BD e e N = and 2 2 B BD BM i N i = . Finally, eq. 6 is as follow: ( ) 12 D BD BT 2 2 2 2 2 1 f BM f TM f BB' D M 2 f 2 2 2 1 BM TM 2 B T DT f BD BD 2 BD M 1 N N N C 2 C C e Ce i 1 C N e i C C C N N = α + + +α τ τ + α +α τ τ + Proof of eq. 6 above: Let’s define: ( ) ( ) 12 2 2 2 1 DT f TM BB'M BT 2 2 2 1 BM TM 2 BM C C e e N C e i α + + τ = α +α τ τ and:

Transcript of Istituto Nazionale di Fisica Nuclearepessina.mib.infn.it/Biblio/Biblio_Articoli/NIMA V A320 p 317...

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1

These Notes refer to paper NIMA V 320, pp 317 324, 1992.

Eq. 4: there is a missing term multiplying 2

2DTf BB'

C C eN

⎛ ⎞+⎜ ⎟⎝ ⎠

. This is the term: 1ατ

. Namely:

( )( ) ( ) ( )

1 22 2 2

2 2 2 21 DT DT DRMS f B T f BB' 2 B f

1 22 22 2 2 2 21 T BB'

DT f B DT f 2 D B f

N C C iENC(e ) C C e C e i iQ N N N

e eC N C C C NC i N i iN N

⎧ ⎫⎛ ⎞α⎪ ⎪⎛ ⎞ ⎛ ⎞ ⎜ ⎟= + + + + + α τ + +⎨ ⎬⎜ ⎟ ⎜ ⎟ ⎜ ⎟τ ⎝ ⎠ ⎝ ⎠⎪ ⎪⎝ ⎠⎩ ⎭

⎧ ⎫α⎪ ⎪⎛ ⎞= + + + + + α τ + +⎨ ⎬⎜ ⎟τ ⎝ ⎠⎪ ⎪⎩ ⎭

1

1

ατ

1 αQ τ

Eq. 5: the term multiplying the second line is α1 instead of α2:

( )( ) ( )

1 22 2 21T BB' DT

D 2 2 2 2 2 2f B T f BB' 2 B f

e e CN

C C e C e i i

α⎧ ⎫+⎪ ⎪τ= ⎨ ⎬⎡ ⎤⎪ ⎪+ + + α τ +⎢ ⎥⎣ ⎦τ⎩ ⎭

where 2

2 TMT

BD

eeN

= , 2

2 BB'MBB'

BD

eeN

= and 2 2B BD BMi N i= .

Finally, eq. 6 is as follow:

( )

1 2

D BD BT 2 2 2 2 21f BM f TM f BB'

D

M 2 f

2 2 21BM TM 2 B

TDT f BD BD

2BD M

1N N NC 2 C C e C e i

1C

N

e i

CC C N

N

⎧ ⎫⎪ ⎪⎪ ⎪⎪ ⎪⎪ ⎪= ⎨ ⎬α ⎡ ⎤⎪ ⎪+ + + α τ⎢ ⎥⎣ ⎦τ⎪ ⎪+⎪ ⎪α⎛ ⎞+ α τ⎜ ⎟⎪ ⎪τ⎝ ⎠⎩ ⎭

+

Proof of eq. 6 above: Let’s define:

( ) ( ) 1 22 2 21

DT f TM BB'MBT 2 2 21

BM TM 2 BM

C C e eN

C e i

α⎧ ⎫+ +⎪ ⎪τ= ⎨ ⎬α⎪ ⎪+ α ττ⎩ ⎭

and:

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2

( ) ( ) 1 22 2 21

D f TM BB'MBD 2 2 21

BM TM 2 BM

C C e eN

C e i

α⎧ ⎫+ +⎪ ⎪τ= ⎨ ⎬α⎪ ⎪+ α ττ⎩ ⎭

From:

( )( ) ( )

( )

( ) ( )

1 22 2 21T BB' DT

D 2 2 2 2 2 21f B T f BB' 2 B f

1 22 2 21 TM BB'M

DT fBD BDDT

2 2DT f 2 2 2 21 TM BB'Mf BD BM f 2 BD BM f

BD BD

e e CN

C C e C e i i

e e C CN NC

C C e eC N C C N i iN N

α⎧ ⎫+⎪ ⎪⎪ ⎪τ= =⎨ ⎬α ⎡ ⎤⎪ ⎪+ + + α τ +⎢ ⎥⎪ ⎪τ ⎣ ⎦⎩ ⎭

⎧ ⎫⎛ ⎞α⎪ ⎪⎜ ⎟+ +⎜ ⎟τ⎪ ⎪⎪ ⎪⎝ ⎠= ⎨ ⎬⎡ ⎤+ ⎪ ⎪α ⎢ ⎥+ + + α τ +⎪ ⎪τ ⎢ ⎥⎪ ⎪⎣ ⎦⎩ ⎭

( )

( ) ( )

( )( )

( )

1 22 2 21 TM BB'M

DT fBD BDDT

2 2DT f 2 2 2 2 2 21 TM BB'Mf BD BM f BD BM TM f 2 BD BM f

BD BD

22 21TM BB'M DT f

DT BD2DT f 21 TM

f BD BM f BD BBD

e e C CN NC

C C e eC 2N C C N C e C N i iN N

1 e e C CC N

C C eC 2N C C N CN

⎧ ⎫⎛ ⎞α⎪ ⎪⎜ ⎟+ +⎜ ⎟τ⎪ ⎪⎪ ⎪⎝ ⎠= ⎨ ⎬⎡ ⎤+ ⎪ ⎪α ⎢ ⎥+ + + + α τ +⎪ ⎪τ ⎢ ⎥⎪ ⎪⎣ ⎦⎩ ⎭

α + +τ

=+ α + +

τ ( )

1 2

22 2 2 2 2BB'M

M TM f 2 BD BM fBD

ee C N i iN

⎧ ⎫⎪ ⎪⎪ ⎪⎪ ⎪⎨ ⎬⎡ ⎤⎪ ⎪⎢ ⎥+ + α τ +⎪ ⎪⎢ ⎥⎪ ⎪⎣ ⎦⎩ ⎭

( )( )

( )

1 2

22 2 2 2 21 1TM BB'M DT f BD BM TM 2 BD BM

DT BD2 2DT f 2 2 21 TM BB'M

f BD BM f f 2 fBD BD

2 2 21BD BM TM 2 BD BM

1 e e C C N C e N iC N

C C e eC 2N C C C iN N

1N C e N i

⎧ ⎫⎪ ⎪⎪ ⎪⎪ ⎪α α⎛ ⎞⎪ ⎪+ + + α τ⎜ ⎟τ τ⎪ ⎪⎝ ⎠= ⎨ ⎬⎡ ⎤+ ⎪ ⎪α ⎢ ⎥+ + + α τ⎪ ⎪τ ⎢ ⎥⎪ ⎪⎣ ⎦+⎪ ⎪α

+ α τ⎪ ⎪τ⎩ ⎭

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3

( )( )( )

1 2

22 2 2 2 21 1TM BB'M DT f BM TM 2 BM2

DT BD2 2 2 2 21DT f f BD BM f TM f BB'M 2 BD f

2 2 2 21BD BM TM 2 BM

1 e e C C C e iC N

C C C 2N C C e C e N i1

N C e i

⎧ ⎫⎪ ⎪⎪ ⎪⎡ ⎤⎡ ⎤α α⎛ ⎞+ + + α τ⎪ ⎪⎢ ⎥⎜ ⎟⎢ ⎥τ τ⎝ ⎠⎪ ⎪⎣ ⎦⎣ ⎦= ⎨ ⎬α ⎡ ⎤+ ⎪ ⎪+ + + α τ⎢ ⎥⎣ ⎦τ⎪ ⎪+⎪ ⎪α⎡ ⎤+ α τ⎪ ⎪⎢ ⎥τ⎣ ⎦⎩ ⎭

The term inside the doubled square brackets is the square of NBT:

( )

1 2

BT DTD 2 2 2 2 21BD DT f f BD BM f TM f BB'M 2 BD f

2 2 2 21BD BM TM 2 BM

N C 1NN C C C 2N C C e C e N i

1N C e i

⎧ ⎫⎪ ⎪⎪ ⎪⎪ ⎪⎪ ⎪= ⎨ ⎬α ⎡ ⎤+ ⎪ ⎪+ + + α τ⎢ ⎥⎣ ⎦τ⎪ ⎪+⎪ ⎪α⎡ ⎤+ α τ⎪ ⎪⎢ ⎥τ⎣ ⎦⎩ ⎭

Or:

( )

1 2

DTD BD BT 2 2 2 2 21DT f f BD BM f TM f BB'M 2 BD f

2 2 2 21BD BM TM 2 BM

C 1N N NC C C 2N C C e C e N i

1N C e i

⎧ ⎫⎪ ⎪⎪ ⎪⎪ ⎪⎪ ⎪= ⎨ ⎬α ⎡ ⎤+ ⎪ ⎪+ + + α τ⎢ ⎥⎣ ⎦τ⎪ ⎪+⎪ ⎪α⎡ ⎤+ α τ⎪ ⎪⎢ ⎥τ⎣ ⎦⎩ ⎭

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4

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Nuclear Instruments and Methods in Physics Research A320 (1992) 317-324North-Holland

A. Gola a, G. Pessina b, P.G. Rancoita b, A. Seidman b c and G. Terzi b° SGS-Thomson Microelectronics, Via Tolomeo 1, 20010, Cornaredo (Mi), Italyn INFN Istituto Nazionale di Fisica Nucleare, Sezione di Milano, Via Celoria 16, 20133 Milano, ItalyTel-Avir University, Ramat Aviv 69 978, Israel

Received 20 January 1992

1 . Introduction

Future hadron colliders such as LHC in the LEPtunnel at CERN and SSC in Texas involve multi-TeVprotons beams. The calorimeters of experiments to beperformed at those colliders face exceptional condi-tions created by very high luminosity and high multi-plicities, and the large variety of physics phenomena tostudy . Therefore, very large numbers of channels andhigh rates of incoming events must be handled .

In this paper the performance of front-end electron-ics employing a monolithic preamplifier realized inHF2CMOS technology is described .When considering front-end realization for a very

high number of channels, matching a single preampli-fier to a single detector is not satisfactory : the opti-mization of the whole calorimeter should be madefrom the system's point of view . The electronic chainmust be modular and able to face more requirements .

The solution we intend to adopt for the calorimeterat SSC/LHC colliders exploits a particular approach,modular in both detector matching and signal shapingat the preamplifier outputs .

The description of flue setup û:.d the experimentalresults are presented . In section 2, an introduction tothe approach used for the readout is given . Section 3 isdevoted to the description of considerations leading to

2. Matching approach

0168-90)2/92/$05 .00 © 1992 - Elsevier Science Publishers B.V . All rights reserved

UCLEARE

EPHYSMS

SectionA

Monolithic matching of silicon detectors with high number of channelsat very short shaping time

The HF2CMOS bipolar-CMOS monolithic technology enables the realization of very fast charge sensitive preamplifiers (withbipolar npn input devices) needed in experiments with very large numbers of channels and high rates of incoming events, like thoseto be performed at the future SSC/LHC hadron colliders. Two preamplifier versions have been realized, V1 and V2 . Both displayabout 100 MHz small signal bandwidth, their power dissipation can vary between 6 and 45 mW, as a function of dynamicrequirements, and can be optimized by programming the current consumption and supply voltage. Their slew rate is 700 and 250V/Ws for versions V1 and V2, respectively. The base spreading resistance of version V2 was reduced to 14 fl, as compared with370 t of version V1 . The equivalent noise charge, for version V2, is about 4700 eRMs at 20 ns RC-CR shaping time, for 150 pFdetector capacitance . An appropriate detector matching approach allows modularity in the integration, with an on chipimplementation of an RC-CR shaper. Version V1 of the preamplifier in this configuration, on printed boards, has beensuccessfully tested .

the design of the new monolithic preamplifier. Mea-surements made on prototype chips are also shown.Finally, in section 4, the theoretical analysis of thematching of the preamplifiers to the detectors is devel-oped. Experimental results of the approach, realizedwith printed boards in a calorimeter run et CERN,confirm the considerations.

The main features of experiments to be performedat the future hadron colliders SSC/LHC are very largenumbers of channels and high counting rates of incom-ing events . The first feature requires front-end elec-tronics with small occupation area and power dissipa-tion, while the second one requires very short shapingtime of the detector signals (about 20 ns) .

These requirements are well satisfied by theHF2CMOS monolithic process employing CMOS andvery fast bipolar transistors. For very short shapingtime the series noise of the preamplifier must be verylow . Bipolar transistors, which have low series noise atlow biasing currents, satisfy that requirement.

In the conceptual design for a silicon calorimeteroriented towards an experiment at SSC tl], the longitu-dinal segmentation considers the use of calorimeter

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318

cells composed of stacks of four detectors, to be con-nected in parallel, having about 150 pF each. Only onesignal for every stack is needed to reconstruct theelectromagnetic or hadronic shower: the stacks areequivalent to detectors of 600 pF each . One preampli-fier, matching the above detector capacitance, can beused as front-end . An alternative approach is to splitthe stack into single detectors, each one connected to amatched preamplifier, and to sum up the output of allpreamplifiers .

It will be shown further that the noise performancesof the two approaches are very similar . This is animportant result, since the second solution is easier torealize from the technological point of view . The possi-bility of developing preamplifiers matching detectors ofrelatively low capacitance permits to reach the highspeed and large dynamic range required by SSC experi-ments, as will be shown in continuation .

3. Single cell monolithic preamplifier

A single cell monolithic charge sensitive preampli-fier prototype (version V1) was realized [2] and theobtained results were very encouraging . The aim of thisversion was to study the characteristics of the newprocess in mixed technology bipolar-CMOSHF2CMOS #' . The single cell, using a small input npnbipolar transistor, yielded very high speed and dynamicrange, with a rise time of 7 ns for a 5 V output voltageswing (700 V/Ws slew rate), and with power dissipationlower than 45 mW [2]. The noise performance waslimited only by the series noise of the base spreadingresistance (RBB - = 370 M.

RBB " could be reduced by increasing the dimensionsof the input transistor, which has a very small area(three times the minimal area of the HF2CMOS pro-cess), in version VI . This is equivalent to connectingdevices in parallel in the case of discrete components .

The npn bipolar transitors, with the smaller areas,produced by employing the HF2CMOS process, has atransition frequency, fT, of about 1 GHz at a minimumbiasing current le = 20 RA, with an input capacitanceof about 130 fF and an R BB , = 1 .1 kSZ (maximum fT isabout 5 GHz at = 0.5 mA biasing current) .

The purpose of the new single cell preamplifierrealized, presented in this paper (version V2), was toimprove the noise performance . The area employedwas chosen for matching the detector impedance. Byusing a transistor with an area N times that of thesmallest one, the preamplifier noise performance can

#1 Developed by SGS-Thomson Microelectronics .

A . Gola et al. / Monolithic matching of silicon detectors

be expressed by means of the equivalent noise charge,ENC(e,lms), [3] :

ENC(e RMS )

NB =

a,

TM

~ e"TMq I TM

I (C° +Cf+NCBM)~ N

+(C° +Cf) eBB 'MN

eTM = 4k BT(13 mV/IcM) being the collector shot noisereferring to the input (k B is the Boltzmann constantand T the absolute temperature), eBB ,M= 4kBTRBB .M ,the base spreading resistance thermal noise, i BM =2gIcm/ß, the base current shot noise ((3 = 100 is thetransistor current gain) and CBM the transistor inputcapacitance ; all these terms refer to a minimum area,working with IcM = 20 [,A ; ij = 4k BT/Rf and iô =2q1° are the parallel noise due to the feedback resis-tance and the detector leakage current I°, respec-tively ; a, and a, are coefficients depending on theshaper following the preamplifier .

Once the detector capacitance is known, by differ-entiating eq . (1) with respect to N, the optimum num-ber of minimum areas to be used in parallel, NB , isobtained [4] :

(C° + Cf)2(eim + eùm)

aa2T MiBM + -eTMCBM

TM

2

NB fulfils the condition for which all the terms propor-tional to I IN in eq . (1) are equal to the terms propor-tional to N .

Consider a feedback capacitance Cf = 10 pF and anRC-CR shaper for the preamplifier signal, for whicha, = a, = exp(2)/8 . For C° = 600 pF, the stack capaci-tance, eq . (2) results in NB = 650 minimum areas,while for C° = 150 pF (a single detector or the stack),NB = 170 minimum areas . In the first case the neededbiasing current for the preamplifier input transistor inorder to obtain the suitable high speed is 13 mA (NBtimes the minimum current IcM ), in the second caseonly 3.5 mA. The realization of a monolithic preampli-fier with an input transistor consuming about 3 mA isfar more practical . In effect, the area used for theinput transistor was slightly smaller than the optimumfor matching C° = 150 pF, the detector capacitance .

In the circuit configuration of version V2 (fig . 1),transistors Q, to Q4 form the classical structure of acharge sensistive configuration : Q, is the input transis-tor, whose dimensions satisfy the above specification,

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A.

R f- if -_

CfFig. 1. Monolithic charge sensitive preamplifier network.

the PMOS Q 2 cascodes Q, and is loaded by the cur-rent generator Q 3 and the Q 4s of the output buffer,where the feedback is closed . The use of the Q 4sDarlington configuration has a double scope . Firstly, asuitable current capability to drive a 50 ft coaxial cableterminated at both ends is obtained . Secondly, a suit-able do shift is set, enabling Q 3 to operate in the rightregion of its characteristics .

For Q 2 , a pMOS, rather than a pnp transistor, waschosen, since the parasitic capacitance at its drainterminal is smaller than that for a pnp, and a lowcapacitance at this node is essential to obtain a largeslew rate . Moreover, pnp transistors are not radiationresistant devices like pMOS transitors [5] .

The design of the biasing network is based on thefact that the precision of integrated components isbetter than 1% for relative values (not for absolutevalues, where 30% is the best obtainable) . The resistorRp sets the reference current for Q6 . Transitors Q3,

Gold et rut / Monolithic matching ofsilicon detectors

Q5, Qc, and Q~ have the same dimensions, thus theratios of resistors R;, R . , and R,, to R4 determine thebiasing currents of Q,, QH,and Q4A. Again the ratio ofresistors R, and R, supplies current I, of the inputtransistor (Q 2 and QK are identical). By settings R; _R S = R6 =R4/ 10 and R 2 = 20R,, the biasing currentof each of the transistors 021 Q ; and Q4A is only 1/20of the Q, biasing current, while the reference currentof Qh is (0.1/20)1, . The Q4B supply current is set byR7 to a similar value to that of Q4A.

Once I, is set, the biasing current of the rest of thepreamplifier is (4.1/20)1,, or about 0.21, . The totalcurrent consumption is, therefore, 1 .21, .

The contribution of the biasing network to thepreamplifier noise is negligible. For the future version,at which more preamplifiers will be placed on the samechip and the node at the Q2 gate will be common forall pMOS transistors, a ground decoupling capacitor,for the connection of the pMOS gate to ground, isforeseen .

The resistor R P is located externally to the chip.This permits a suitable setting of the biasing current ofQ, . Not all the detectors in the calorimeter need largedynamic ranges: a lower current consumption, on ac-count of speed and noise, and a lower biasing voltageresults in reducing the power dissipation . The values ofthe supplied current and voltage depend, therefore, onthe dynamic requirements and noise performances .

The monolithic layout of the version V2 employs aninput transistor designed to obtain a low RBB., in therange needed for this application, but slightly largerthan expected . In fig . 2 a photograph of the monolithicchip is shown .

Fig. 2. Photograph of the monolithic layout of the charge sensitive preamplifier in fig . 1 .

31 9

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320 A. Gold et al. / Monolithic matching of silicon detectors

62 .5 mV/div

5.00 ns/div

Fig . 3. Small signal response of the preamplifier. The fre-quency bandwidth is about 100 MHz.

3.1 . Dynamic performances of version V2

Fig. 3 illustrates the very high speed of the versionV2 preamplifier. The small signal response to an inputdelta current has a rise time of less than 4 ns, thus thepreamplifier bandwidth approaches about 100 MHz.The operation conditions, for these values and all thefollowing ones, are obtained with a feedback capaci-tance of 10 pF and a simulated detector impedance of150 pF, the typical experimental case . The signal isacquired at the receiving end of a 50 SZ coaxial cable,terminated at both ends.

The large signal response is shown in fig . 4 . Here, a5 V output voltage swing, 2.5 V at the end of theterminated 50 11 coaxial cable, is shown. The rise timeis 16 ns and the slew rate about 250 V/ps. The slewrate of version V2 is smaller than that of version V1.The reason is the collector parasitic capacitance of theinput transistor Q1 , which is bigger then expected(about 3 pF). Since the total impedance at the input ofthe PMOS 02 is not very low (= 500 l) for small

500 mV/div

10 .0 ns/div

t,. = 16 nsev

Fig . 4. Largc signal response of the preamplifier. The slewrate is about 250 V/ p,s .

50403020100

-10-20-30-40-500 1000 2000 3000 4000

VOUT (MV)Fig . 5 . Preamplifier integral nonlinearity . In the 5 V outputswing (2 .5 V at the recieving end of a 50 il coaxial cableterminated at both ends, where a factor 2 reduction is made,as shown) the nonlinearity is within 8%c, compatible with

errors of measurements.

signals, and increase for large signals, the large dis-charge time constant of this node is not negligible (= 6ns) . The next preamplifier version will have a doublecascode loading Q1, the first cascode element being annpn transistor . This way the impedance at the Q,collector will be decreased to the value of about 8 fl(26 mV/I1 ), leading to a negligible time constant of 80ps .

Fig. 5 presents the plot of the integral nonlinearityof the preamplifier, realized with a differential mea-surement able to obtain a sensitivity of less than 3%o[6] . Nonlinearity is expressed by the difference betweenthe expected output voltage and the measured one,divided by the maximum output range : the preampli-fier shows a good response, within 8%o of nonlinearity,in the 5 V output voltage range .

Another important parameter for the preamplifieris the power dissipation, which is tied to the requiredoutput voltage swing . As seen above, once I 1 is set, thetotal preamplifier biasing current is about 1 .21 1 . Fromfig . 1, it can be seen that the minimum required biasingvoltage is the sum of 3 VBE = 2 V (VBE is the baseemitter biasing voltage) above the negative voltagesupply, 2 V pMOS biasing voltage, the voltage acrossR 1 (1 kfl resistor) and the needed swing Vom . Thepreamplifier power dissipation is, therefore :Po = 1 .201 1(4 V +R II, + Vom ) .

(3)If maximum dynamic range and speed are required, I,must be 3 mA. The default power dissipation is about25 mW and, for a 5 V output voltage swing, Pp = 42mW is obtained . If a smaller swing is needed and thenoise is slightly worse (less than 6%), 1 mA for Q,permits the preamplifier to work, leading to a powerdissipation of less than 6 mW. For I, = 1 mA, thepreamplifier rise time is less than 20 ns, while for 1 .5mA (r 10 mW power dissipation), it is about 10 ns . Aswill be shown later, I, should not be set to smaller

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values than 1 mA, since the series noise of the pream-plifier would increase .

3.2. Noise performances of version V2

The main noise factor of the preamplifier is at-tributed to the value of the base spreading resistanceRBB" which contributes to the series noise .

The method for measuring RBB - is based on thefact that the preamplifier series noise (eq. (1)) is pro-portional to the detector capacitance CD (for largevalues) and small shaping time . Hence, by varying CD,a straight line, whose angular coefficient is propor-tional to the series noise, is obtained.

The preamplifier rise time depends on the value ofthe input capacitance CD, especially for large CD val-ues. To keep the response of the shaper independentof the preamplifier rise time, avoiding affecting themeasurements, a 100 ns shaping time of an RC-CRshaper was chosen : the minimum which permits thepeaking time position to be constant, with respect toCD, in the large range selected (= 5 nF).

The squared parallel noise of the bias input currentand the feedback resistance was subtracted . The esti-mate of the parallel noise was inferred by measuresmade at a large shaping time and zero detector capaci-tance, where the series noise becomes negligible . ForRf= 20 kfl, CD = 0 pF and -r = 500 ns, the ENCresulted in about 13 keRMS, corresponding to a biascurrent for the input transistor IB = 27 RA, plus the Rfthermal noise. The effects of this noise source, scaledat 100 ns shaping time, is 5.8 keRMS.

The final result of the above setup is shown in fig. 6,where ENC vs CD is plotted. As can be seen, goodlinearity in the measurements was obtained . From theslope of the straight line, about 10.5 e/pF, the seriesnoise of the preamplifier is calculated . A series resis-

20".

0.0

A. Gold et al. / Monolithic matching ofsilicon detectors

1000 . 3000 . 5000 .

CD (pF)Fig. 6. Equivalent noise charge vs detector capacitance . Measurements are taken with an RC-CR shaper of 100 ns .

Squared parallel noise is subtracted.

32 1

tance of about 18.5 ft was found. By subtracting theinput collector resistance noise of 13 mV/I, = 4.3 Qan .RBB . = 14 fl results .

If the above parameters are substituted in the ex-perimental case with Cf = 10 pF, Rf = 20 k f2, CD = 150pF, Ic = 3 mA and -r = 20 ns for an RC-CR shaper,the expected, and actually measured, ENC is about4700 eRMS . This is in good agreement with the theoret-ical ENC of about 4100 eRMS, for the ideally matchedpreamplifier, in the same operative condition : the dif-ference in the ENC value is less then 15%.

It should be mentioned that input transistor Q ' is asingle transistor with appropriate dimensions. Thisavoids possible uncertainty in the noise performanceover a large production range, as is actually verified bythe parallel connection of discrete devices, with theusual spread in their static characteristics.

When a large dynamic range is not needed, theinput transistor can be biased with a lower biasingcurrent I,, reducing the bandwidth, as seen above. But,a great margin exists before the preamplifier rise timebecomes incompatible with the 20 ns shaping time .

The series preamplifier noise, due to the collectorshot noise of the input device, increases when I, de-creases . Its equivalent noise resistance is 13 mV/I, .Thus, when Il = 1 mA, a nonnegligible noise resistance(13 f2,) is added: small currents cannot be used withoutdegrading the resolution . If I, is at least in the 1 mArange, the noise increase is negligible (less than 6%),and the power dissipation becomes small, as seen be-fore .

4. Preamplifiers array

As already stated, the calorimeter is composed ofstacks of four detectors, to be connected in parallel,150 pF capacitance each . One signal from every stackis needed . The single cell monolithic preamplifiermatches a detector of CD = 150 pF. Thus, the stackcan be separated into four detectors, each one matchedand read out by a preamplifier. Then, the sum of theoutput signals of the preamplifiers yields the stacksignal .

It is possible to test the noise behaviour of thissetup for the case when a single preamplifier, matchingthe whole stack, is used .

Suppose to have a stack of detectors with a capaci-tance CDT, which can be split into N detectors, eachone read out by a preamplifier with known noisecharacteristics . The outputs of the preamplifiers are allsummed up and a shaping of the resultant signal ismade . Whatever the share of the charge generated by

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322

the particle in the stack may be, the ENC of thearrangement results in

ENC(e RMS) _

The ENC of the arrangement is equivalent to that of asingle preamplifier having an input transistor N timesbigger, a feedback capacitance (NCf) N times bigger,and a feedback resistance (Rf/N) N times smallerthan that of the single preamplifier .

The noise performances are degraded by the paral-lel noise of Rf/N and the contribution at the inputcapacitance, given by NCf . These effects can be madenegligible if NCf is smaller than CDT and the feedbackthermal noise is smaller than the parallel shot inputnoise .

The optimum number of detectors per stack, ND , isobtained by differentiating eq . (4) with respect to N:

aI 1'7

lND =[(

(eT + e6B ")CDTI

X~

a2[(Cf + CB)2e

+CfeBB']~T

+a,T(IB+if)}

cil CDT) 2

N

+Cf + CB

eTT

+

(

NCDT + Cf

)2

eBB'

1/,ID 2 ;

+a-,T(N +iB+if

al[CDT +N(Cf+CA' N

+(CDT +NCf)` eBB~N

A. Gola et al. / Monolithic matching ofsilicon detectors

1/2

+a,7 [ib + N(iB + if)J

(4)

Fig . 7 . Prearnplifier arra ,, and shaper: the network will be fullyintegrated, on a single chip .

By using for the preamplifier noise, the terms resultingfrom eq . (2), with R f = 20 kil and Cf = 10 pF, when amatching with CD = 150 pF was calculated giving NBD= 170, the ND obtained is about 3.6. The productNDNBD is then about 612, as compared with N BT = 647,for CD = 600 pF . The increase is only 6% . The substi-tution in eq . (5) of all the parameters consideredpermits to write

ND NBD = NBT

CDTBT

CDT + Cf

X 1 + ~ aI[(Cf + 2NDCBMCf )eTM

+CfeBB . M, +a,TNDIf j

I/2a

X ND2 _2(

CBMeTM +a 2TlBM)T

As mentioned above, the ratio between NDNBD andNBT depends on the preamplifier feedback capacitanceand resistance . The term in brackets in eq . (6) gives theevaluation of the possibility to use stack splitting (intomany detectors) with respect to a single preamplifierreadout .

For this case, a single preamplifier matched to 600pF gives an ENC of about 7900 e RMS. When using anarray of preamplifiers matching 150 pF, the term inbrackets in eq. (6) is about 0.94, and when split intofour detectors, an ENC of 8290 e RMS is obtained, anincrease of less than 4%. The expected ENC for thenew preamplifier is about 9370 eRMS, an increase ofabout 13%; best results should be obtained if the stackis split, in this case, into seven detectors (ENC < 8750eRMS) . The effect on noise is due to the equivalentfeedback resistance Rf/ND and capacitance NDCf . Infact, the term in brackets in eq . (6) now becomes about0.90 . Thus, better performance should require smallerCf and larger Rf .

To obtain maximum saving in space occupation, allpreamplifiers of the stack should be integrated on asingle chip . Also, the signal sum and the shaper shouldbe on the same chip. The scheme of the network canbe seen in fig . 7 . The output voltage of every preampli-fier of the stack is converted to a current by thetransistors QA . All the currents are summed up at theinput of the output preamplifier, where a feedbacknetwork acts as an RC-CR shaper . The voltage polar-ity of the output is the same as that of the inputpreamplifier, because of the change of the signal polar-ity defined by transistors QA. This way, the design ofthe output preamplifier can be the same as that in fig .3, with the same dynamic and speed characteristics . In

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A. Gold

Fig. 8. Modification of the preamplifier output stage . The aimof the dc voltage set by diode D, is to bias the bases of

transistors QA of fig . 7 .

order to bias the base of the transistors QA, with aminimum voltage of 2VBE, the output stage of thepreamplifier of fig . 3 will be changed as in fig. 8 . Theadding of ûiûde D, sets the right voltage ât the basesof QA.

It is easy to show that by setting T = RBCB = RcCc,the output voltage of the shaper is given by [2] :

jWT

N

OV(w)=a iY- -(7)(1 +j(07)2 i=l jwCf ,

which is the classical RC-CR transfer function (abeing the ratio between Rc and the resistor at theemitter of QA)*

The configuration of fig. 7, with the modification offig . 8, has been tested at CERN, as printed boards,

et al. / Monolithic matching ofsilicon detectors

with a calorimeter, fig . 9, of 108 preamplifier channelsand 27 amplifiers for summing and shaping . Thepreamplifier used was version V1 (version V2 was builtin a limited number of pieces, to test the expectedperformances).

Each preamplifier is coupled to two 2 x 2 cm' ac-tive area Si detectors along the beam direction (overallinput detector capacitance about 208 pF) . A summa-tion circuit is used (fig . 7) to sum and shape the outputsignals from four subsequent preamplifiers along thebeam direction . This corresponds to sum the energydeposited and sensed by eight subsequent detectorsalong the beam direction .

The calorimeter has an active plane consisting ofnine Si detectors (i .e . a transverse-to-the-beam area of6 x 6 cm'). A sampling plane is located every radiationlength, X� , of W. The calorimeter has an overall depthof 24XO. Therefore, a summation circuit correspondsto a cell having a transverse-to-the beam area of 2 x 2cm2 and a depth of 8X� . In fig 10, the pedestal noisedistribution of a W particle traversing a calorimeter cellis shown . The most probable energy loss of the p,particle is 1044 ± 15 keV. This value is well in agree-ment with the one expected for a minimum ionizingparticle traversing a 3.16 mm thick silicon absorber (i .e .8 fully depleted Si detectors) . The standard deviation

Fig . 9 . Side view of the Si/W e.m . calorimeter with the minitower structure read out .

323

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324

A. Gol: et al.

50

40

20z

0

5. Conclusions

N

u

1

~LMndrur-.1&é1 n

[MeV ]Fig. 10. Pedestal noise distribution and deposited energy

distribution of a W particle traversing a calorimeter cell .

of the pedestal noise distribution is 160 ± 5 keV, corre-sponding to the single preamplifier noise of about 80keV . This latest value is well in agreement with theexpected one for the version V1, when the input capac-itance is about 208 pF and the RC-CR shaping time of20 ns is used [2]. Good uniformity was obtained in theresponse of the read-out chains .

For the near future a monolithic implementation ofthe array with the preamplifier version V2 is beingdesigned .

The modularity of the single cell preamplifier willbe used in the realization of preamplifiers arrays withthe shaper integrated on a single chip. Also single cellpreamplifiers will be integrated to be employed as asingle channel preamplifier or shaper, as required bysome zones of the calorimeter for the future SSC/LHCexperiment [7] .

Experiments like those to be performed at theSSC/LHC future colliders, with very large numbers ofdetectors and high rates of incoming events, requirethe front-end readout to be fast, with low noise andpower consumption, and of minimum dimensions .

The bipolar-CMOS monolithic process HF2CMOSis able to fulfil the above requirements . Two versionsof the preamplifier, V1 and V2, have been realized .Preamplifier version V1 has a base spreading resis-tance of about 370 fl, IOOMHz small signal bandwidthand 700 V/~ts slew rate . The signal bandwidth ofpreamplifier version V2 is the same as for version VI,the slew rate is about 250 V/ws, due to the presenceof a parasitic capacitance at the collector of the inputtransistor (the problems will be solved in the nextversion), which was enlarged to obtain a smaller -Rgg ,,

/ Monolithic matching ofsilicon detectors

of about 14 f2 . Version V2 can drive terminated 50 ftcoaxial cables and its power dissipation can vary from 6to 45 mW, depending on the required signal dynamicrange, small signals of up to 5 V. The setting of thenetwork current consumption is programmed via aresistor, located externally to the chip . The equivalentnoise charge for version V2 at 20 ns RC-CR shapingtime and 150 pF of detector capacitance is 4700 eRMS.

When the calorimeter can be divided into stacks ofdetectors, it is possible to show that reading everydetector signal of the stack with a single preamplifierand then summing all the preamplifier outputs givesnoise performances which are very similar to that whenall the detectors of the stack are connected in parallel,and read out by a single preamplifier. This permits asimpler monolithical implementation with modularityof the numbers of channels integrated on a single chipand the on chip implementation of an RC-CR shaper.

Experimental results on the signal-to-noise ratio,from a first test of the above structure realized (em-ploying printed boards with preamplifier version V1) toread out the minitower structure of a Si/W e.m .calorimeter [1] are in good agreement with the ex-pected values .

Acknowledgements

The authors are indebted to Prof . P.F . Manfredi(University of Pavia and INFN Milano) for reading themanuscript and for his fruitful suggestions . We thankR. Benedet (INFN) for the help in the graphic presen-tation and M. Leone (SGS-THOMSON) for the mono-lithic layout .

References

[1] C. Bertrand et al ., Silicon calorimetry for the SSC, Proc .Workshop on Calorimetry for New Supercolliders, eds . R .Donaldsson and M.G.D . Gilchriese, Tuscoaloosa, USA,13-17 March 1989 (World Scientific, Singapore) p . 489 .

[2] A . Gola, G. Pessina and P.G . Rancoita, Nucl . Instr. andMeth . 292 (1990) 648 .

[3] E. Gatti and P.F. Manfredi, Processing the signal fromsolid state detectors in elementary particle physics, LaRivista Del Nuovo Cimento, 9, Serie 3 (1986).

[4] E. Gatti, A . Hrisoho and P.F . Manfredi, IEEE Trans .Nucl . Sci . NS-30 (1983) 319.

[5] G.C . Messenger and M.S. Ash, The Effects of Radiationon Electronics Systems (Van Nostrand Reinhold, NewYork, 1986) .

[6] D.V. Camin, G . Pessina and E. Previtali, IEEE Trans.Nucl . Sci . NS-38 (2) (1991) 53 .

[7] A silicon calorimeter model operated in a strong magneticfield with VLSI read out for LHC, proposal to the CERNDetector Research & Development Committee,CERN/DRDC/91-54 DRDC/P34 (13th January, 1992).