Import Ante Step Up Che Potrebbe Costare Di Meno Sc120

8/6/2019 Import Ante Step Up Che Potrebbe Costare Di Meno Sc120

1/32 2010 Semtech Corporation

POWER MANAGEMENT

1

SC120Low Voltage Synchronous

Boost Regulator

FeaturesInput voltage 0.7V to 4.5VMinimum input startup voltage 0.865VOutput voltage fxed at 3.3V; adjustable rom 1.8Vto 5.0VPeak input current limit 1.2AOutput current at 3.3 V OUT 80mA with V IN = 1.0V,190mA with V IN = 1.5VE ciency up to 94%Internal synchronous rectiferSwitching requency 1.2MHzAutomatic power saveAnti-ringing circuitOperating supply current (measured at OUT) 50 AShutdown current 0.1 A (typ)No orward conduction path during shutdownAvailable in ultra-thin 1.5 2.0 0.6 (mm)MLPD-UT-6 and SOT23-6 packagesLead- ree and halogen- reeWEEE and RoHS compliant

ApplicationsMP3 players

Smart Phones and cellular phonesPalmtop computers and handheld InstrumentsPCMCIA cardsMemory cardsDigital cordless phonesPersonal medical productsWireless VoIP phonesSmall motors

Description The SC120 is a high e iciency, low noise, synchronousstep-up DC-DC converter that provides boosted voltagelevels in low-voltage handheld applications. The wideinput voltage range allows use in systems with singleNiMH or alkaline battery cells as well as in systems withhigher voltage battery supplies. It eatures an internal1.2A switch and synchronous rectifer to achieve up to94% e ciency and to eliminate the need or an externalSchottky diode. The output voltage can be set to 3.3Vwith internal eedback, or to any voltage within the speci-fed range using a standard resistor divider.

The SC120 operates in Pulse Width Modulation (PWM)mode or moderate to high loads and Power Save Mode(PSAVE) or improved e ciency under light load condi-tions. It eatures anti-ringing circuitry or reduced EMI innoise sensitive applications. Output disconnect capabilityis included to reduce leakage current, improve e ciency,and eliminate external components sometimes needed todisconnect the load rom the supply during shutdown.

Low quiescent current is obtained despite a high 1.2MHzoperating requency. Small external components and thespace saving MLPD-UT-6, 1.52.00.6 (mm) package, orlow cost SOT23-6 package, make this device an excellentchoice or small handheld applications that require thelongest possible battery li e.

L1

C IN

3.3VSingle

Cell(1.2V)

IN

OUT

LX

EN

FB

SC120

COUT

GND

Typical Application Circuit

April 30, 2010


2/32

SC120

2

120yw

Marking In ormation SOT23

Ordering In ormation

Device Package

SC120ULTRT(1)(2) MLPD-UT-6 1.52

SC120SKTRT(1)(2) SOT23-6

SC120EVB Evaluation Board, MLPD-UT-6 version

SC120SKEVB Evaluation Board, SOT23-6 version

Notes:(1) Available in tape and reel only. A reel contains 3,000 devices.(2) Lead- ree packaging, only. Device is WEEE and RoHS compliant,

and halogen- ree.

Pin Confguration MLPD-UT

TOP VIEW

TIN EN

GND FB

OUTLX 6

5

4

1

2

3

MLPD-UT; 1.52, 6 LEAD

JA = 84C/WCP00

Top View

yyww

Bottom View

MLPD-UT; 1.52, 6 LEADyw = date code

Marking In ormation MLPD-UT

Pin Confguration SOT23

Top View

LX1 2 3

456

GNDIN

OUTFBEN

SOT23; 6 LEAD JA = 130C/W

SOT23, 6 LEADyyww = date code


3/32

SC120

3

Exceeding the above specifcations may result in permanent damage to the device or device mal unction. Operation outside o the parametersspecifed in the Electrical Characteristics section is not recommended.

NOTES:(1) Tested according to JEDEC standard JESD22-A114.(2) Calculated rom package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.

Absolute Maximum Ratings

IN, OUT, LX, FB (V) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0

EN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)

ESD Protection Level (1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Recommended Operating Conditions

Ambient Temperature Range (C) . . . . . . . . . . . . -40 to +85

VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.7

VOUT

(V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8 t

Thermal In ormation

Thermal Res. MLPD, Junction-Ambient (2) (C/W) . . . . . . . 84

Thermal Res., SOT23, Junction -Ambient (2) (C/W) . . . 130

Maximum Junction Temperature (C) . . . . . . . . . . . . . . . 150

Storage Temperature Range (C) . . . . . . . . . . . -65 to +150

Peak IR Re ow Temperature (10s to 30s) (C) . . . . . . +260

Unless otherwise noted V IN = 2.5V, CIN = COUT = 22 F, L1 = 4.7 H, TA= -40 to +85C. Typical values are at T A = 25C.

Parameter Symbol Conditions Min Typ Max Units

Input Voltage Range V IN 0.7 4.5 V

Minimum Startup Voltage V IN-SU IOUT < 1mA, TA = 0C to 85C 0.865 V

Shutdown Current I SHDN TA = 25C, VEN = 0V 0.1 1 A

Operating Supply Current (1) IQ In PSAVE mode, non-switching, measured at OUT 50 A

Internal Oscillator Frequency OSC 1.2 MHz

Maximum Duty Cycle D MAX 90 %

Minimum Duty Cycle D MIN 15 %

Output Voltage V OUT VFB = 0V 3.3 V

Adjustable Output Voltage Range V OUT_RNG For VIN such that D MIN < D < DMAX 1.8 5.0 V

Regulation Feedback Re erence Volt-age Accuracy (Internal or ExternalProgramming)

VReg-Re -1.5 1.5 %

FB Pin Input Current I FB VFB = 1.2V 0.1 A

Startup Time t SU 1 ms

Electrical Characteristics


4/32

SC120

4

Parameter Symbol Conditions Min Typ Max Units

P-Channel ON Resistance R DSP VOUT = 3.3V 0.6

N-Channel ON Resistance R DSN VOUT = 3.3V 0.5

N-Channel Current Limit I LIM(N) VIN = 3.0V 0.9 1.2 A

P-Channel Startup Current Limit I LIM(P)-SU VIN > VOUT, VEN > VIH 150 mA

LX Leakage Current PMOS I LXP TA = 25C, VLX= 0V 1 A

LX Leakage Current NMOS I LXN TA = 25C, VLX= 3.3V 1 A

Logic Input High V IH VIN = 3.0V 0.85 V

Logic Input Low V IL VIN = 3.0V 0.2 V

Logic Input Current High I IH VEN = VIN = 3.0V 1 A

Logic Input Current Low I IL VEN = 0V -0.2 A

Electrical Characteristics (continued)

NOTES:(1) Quiescent operating current is drawn rom OUT while in regulation. The quiescent operating current projected to IN is approximately

IQ (VOUT /VIN).


5/32

SC120

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0.1 0.2 0.5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 499k , R 2 = 1M , L = 4.7 H, T A = 25C

0.1 0.2 0.5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 499k , R 2 = 1M , L = 4.7 H, VIN = 1.2V

Typical Characteristics V OUT = 1.8V

VIN = 1.6V

VIN = 1.2VVIN = 0.8V

TA = 25C

TA = 85C

TA = 40C

0 50 100 150 200 2501.76

1.78

1.8

1.82

1.84

IOUT (mA)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, TA = 25C

0 50 100 150 200 2501.76

1.78

1.8

1.82

1.84

IOUT (mA)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, VIN = 1.2V

VIN = 1.6V

VIN = 1.2VVIN = 0.8V TA = 25C

TA = 85C

TA = 40C

0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.61.76

1.78

1.8

1.82

1.84

VIN (V)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, IOUT = 5mA

0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.61.76

1.78

1.8

1.82

1.84

VIN (V)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, IOUT = 35mA

TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

TA = 85C

TA = 40C

Ef ciency vs. I OUT (VOUT = 1.8V) Ef ciency vs. I OUT (VOUT = 1.8V)

Load Regulation (V OUT = 1.8V) Load Regulation (V OUT = 1.8V)

Line Regulation PSAVE Mode (V OUT = 1.8V) Line Regulation PWM Mode (V OUT = 1.8V)


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SC120

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-50 -25 0 25 50 75 1001.76

1.78

1.8

1.82

1.84

Junction Temperature (o

C)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, IOUT = 5mA

-50 -25 0 25 50 75 1001.76

1.78

1.8

1.82

1.84


C)

V O U T

( V )

R1 = 499k , R 2 = 1M , L = 4.7 H, IOUT = 35mA

Typical Characteristics V OUT = 1.8V (continued)

VIN = 1.6V

VIN = 1.2V

VIN = 0.8V

VIN = 1.6V

VIN = 1.2V

VIN = 0.8V

0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.60

10

20

30

40

50

VIN (V)

I O U T

( m A )

R1 = 499k , R 2 = 1M , L = 4.7 H

0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.60

20

40

60

80

100

120

140

160

VIN (V)

E q u

i v a

l e n

t R L

O A D (

)

R1 = 499k , R 2 = 1M , L = 4.7 H

TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

Temperature Regulation PSAVE Mode (V OUT = 1.8V) Temperature Regulation PWM Mode (V OUT = 1.8V)

Startup Maximum Load Current vs. V IN (VOUT = 1.8V) Startup Minimum Load Resistance vs. V IN (VOUT = 1.8V)

0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.60

50

100

150

200

250

300

350

VIN (V)

I O U T

( m A )

R1 = 499k , R 2 = 1M , L = 4.7 H

TA = 25C

TA = 85C

TA = 40C

Maximum I OUT vs. VIN (VOUT = 1.8V)


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0.1 0.2 0.5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

FB grounded, L = 4.7 H, VIN = 2V

0.1 0.2 0 .5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

FB grounded, L = 4.7 H, TA = 25C

VIN = 2.0V

VIN = 1.0V

VIN

= 3.0V

TA = 25C

TA = 85C

TA = 40C

0 50 100 150 200 250 300 350 4003.2

3.24

3.28

3.32

3.36

3.4

IOUT (mA)

V O U T

( V )

FB grounded, L = 4.7 H, VIN = 2V

0 50 100 150 200 250 300 350 4003.2

3.24

3.28

3.32

3.36

3.4

IOUT (mA)

V O U T

( V )

FB grounded, L = 4.7 H, T A = 25C

VIN

= 2.0V

VIN = 3.0V

VIN = 1.0V

TA = 25C

TA = 85C

TA = 40C

TA = 85C

0.6 1 1.4 1.8 2.2 2.6 3 3.43.2

3.24

3.28

3.32

3.36

3.4

VIN (V)

V O U T

( V )

FB grounded, L = 4.7 H, IOUT = 75mA

0.6 1 1.4 1.8 2.2 2.6 3 3.43.2

3.24

3.28

3.32

3.36

3.4

VIN (V)

V O U T

( V )


TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

TA = 40C

Ef ciency vs. I OUT (VOUT = 3.3V)Ef ciency vs. I OUT (VOUT = 3.3V)

Load Regulation (V OUT = 3.3V)Load Regulation (V OUT = 3.3V)

Line Regulation PWM Mode (V OUT = 3.3V)Line Regulation PSAVE Mode (V OUT = 3.3V)


8/32

SC120

8


-50 -25 0 25 50 75 1003.2

3.24

3.28

3.32

3.36

3.4


C)

V O U T

( V )


-50 -25 0 25 50 75 1003.2

3.24

3.28

3.32

3.36

3.4


C)

V O U T

( V )


VIN = 2.0V

VIN = 3.0V

VIN = 1.0V

VIN = 2.0V

VIN = 3.0V

VIN = 1.0V

0.6 1 1.4 1.8 2.2 2.6 3 3.40

20

40

60

80

100

120

140

160

VIN (V)

E q u

i v a

l e n

t R L

O A D (

)

FB grounded, L = 4.7 H

0.6 1 1.4 1.8 2.2 2.6 3 3.40

10

20

30

40

50

60

70

80

90

VIN (V)

I O U T

( m A )


TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

Temperature Regulation PWM Mode (V OUT = 3.3V)Temperature Regulation PSAVE Mode (V OUT = 3.3V)

Startup Minimum Load Resistance vs. V IN (VOUT = 3.3V)Startup Maximum Load Current vs. V IN (VOUT = 3.3V)

0.6 1 1.4 1.8 2.2 2.6 3 3.40

50

100

150

200

250

300

350

400

450

500

VIN (V)

I O U T

( m A )


TA = 25C

TA = 85C

TA = 40C



9/32

SC120

9

0.1 0.2 0 .5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF, T A = 25C


0.1 0.2 0 .5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF, V IN = 2.4V

VIN = 2.4V

VIN = 1.2V

VIN = 3.2V

TA = 25C

TA = 85C

TA = 40C

0 50 100 150 200 250 300 350 4003.85

3.9

3.95

4

4.05

4.1

IOUT (mA)

V O U T

( V )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF, T A = 25C

0 50 100 150 200 250 300 350 4003.85

3.9

3.95

4

4.05

4.1

IOUT (mA)

V O U T

( V )


VIN = 3.2V

VIN = 2.4VVIN = 1.2V TA = 25C

TA = 85C

TA = 40C

TA = 40C

TA = 85C

TA = 25C

0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.83.85

3.9

3.95

4

4.05

4.1

VIN (V)

V O U T

( V )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF, I OUT = 5mA

0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.83.85

3.9

3.95

4

4.05

4.1

VIN (V)

V O U T

( V )


TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C





10/32

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10


-50 -25 0 25 50 75 1003.85

3.9

3.95

4

4.05

4.1


C)

V O U T

( V )


-50 -25 0 25 50 75 1003.85

3.9

3.95

4

4.05

4.1


C)

V O U T

( V )


VIN = 3.2V


VIN = 3.2V

VIN = 2.4V

VIN = 1.2V

0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.80

10

20

30

40

50

60

70

80

90

100

VIN (V)

I O U T

( m A )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF

0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.80

20

40

60

80

100

120

140

160

VIN (V)

E q u

i v a

l e n

t R L

O A D (

)

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF

TA = 25C

TA = 85C

TA = 40C TA = 25C

TA = 85C

TA = 40C


Startup Maximum Load Current vs. V IN (VOUT = 4.0V) Startup Minimum Load Resistance vs. V IN (VOUT = 4.0V)

0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.80

50

100

150

200

250

300

350

400

450

500

VIN (V)

I O U T

( m A )

R1 = 931k , R 2 = 402k , L = 4.7 H, C FB = 2.2pF

TA = 25C

TA = 85C

TA = 40C



11/32

SC120

11

Typical Characteristics V OUT = 5.0V, Low V IN Range

0.1 0.2 0.5 1 2 5 10 20 50 1000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 294k , L = 3.3 H, C FB = 10pF, T A = 25C

0.1 0.2 0.5 1 2 5 10 20 50 1000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 294k , L = 3.3 H, C FB = 10pF, V IN = 1.2V

VIN = 1.6V

VIN = 1.2V

VIN = 0.8V

TA = 25C

TA = 85C

TA = 40C

0 20 40 60 80 100 1204.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )

R1 = 931k , R 2 = 294k , L = 3.3 H, C FB = 10pF, T A = 25C

0 20 40 60 80 100 1204.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )

R1 = 931k , R 2 = 294k , L = 3.3 H, C FB = 10pF, V IN = 1.2V

VIN = 1.6V

VIN = 1.2V

VIN = 0.8V

TA = 25C

TA = 85C

TA = 40C

0.6 0.8 1 1.2 1.4 1.6 1.84.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )

R1 = 931k , R 2 = 294k , L = 3.3 H, C FB = 10pF, I OUT = 1mA

0.6 0.8 1 1.2 1.4 1.6 1.84.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )


TA = 25C

TA = 85C

TA = 40C

TA

= 25C TA

= 85C

TA = 40C

TA = 85C

TA = 40C




TA = 40C


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SC120

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Typical Characteristics V OUT = 5.0V, Low V IN Range (continued)

-50 -25 0 25 50 75 1004.9

4.95

5

5.05

5.1


C)

V O U T

( V )


-50 -25 0 25 50 75 1004.9

4.95

5

5.05

5.1


C)

V O U T

( V )


VIN = 1.6V

VIN = 1.2V

VIN = 0.8V

VIN = 1.6V

VIN = 1.2V


VIN = 0.8V

See page 16 or all V OUT = 5.0V operation and startup load data.


13/32

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Typical Characteristics V OUT = 5.0V, Mid V IN Range

0.1 0.2 0.5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )


0.1 0.2 0.5 1 2 5 10 20 50 100 2000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 294k , L = 4.7 H, C FB = 2.2pF, T A = 25C

VIN = 2.4V

VIN = 1.6V

VIN = 3.2V

TA = 25C TA = 85C

TA = 40C

0 50 100 150 200 250 300 3504.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )


0 50 100 150 200 250 300 3504.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )

R1 = 931k , R 2 = 294k , L = 4.7 H, C FB = 2.2pF, T A = 25C

VIN = 2.4V VIN = 3.2VVIN = 1.6V

TA = 25C TA = 85C

TA = 40C

TA = 85C

1.2 1.6 2 2.4 2.8 3.24.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )


1.2 1.6 2 2.4 2.8 3.24.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )


TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

TA = 40C

Ef ciency vs. I OUT (VOUT = 5.0V)Ef ciency vs. I OUT (VOUT = 5.0V)

Load Regulation (V OUT = 5.0V)Load Regulation (V OUT = 5.0V)

Line Regulation PWM Mode (V OUT = 5.0V)Line Regulation PSAVE Mode (V OUT = 5.0V)


14/32

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Typical Characteristics V OUT = 5.0V, Mid V IN Range (continued)

-50 -25 0 25 50 75 1004.9

4.95

5

5.05

5.1


C)

V O U T

( V )


-50 -25 0 25 50 75 1004.9

4.95

5

5.05

5.1


C)

V O U T

( V )


VIN = 2.4V

VIN = 3.2V

VIN = 1.6V

VIN = 2.4V

VIN = 3.2V

VIN = 1.6V

Temperature Regulation PWM Mode (V OUT = 5.0V)Temperature Regulation PSAVE Mode (V OUT = 5.0V)

See page 16 or all V OUT = 5.0V operation and startup load data.


15/32

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15

Typical Characteristics V OUT = 5.0V, High V IN Range

0.1 0.2 0 .5 1 2 5 10 20 50 100 200 5000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )

R1 = 931k , R 2 = 294k , L = 6.8 H, C FB = 2.2pF, T A = 25C

0.1 0.2 0 .5 1 2 5 10 20 50 100 200 5000

10

20

30

40

50

60

70

80

90

100

IOUT (mA)

E f f i c i e n c y

( % )


VIN = 3.6V

VIN = 3.0V

VIN = 4.2V

TA = 25C

TA = 85C

TA = 40C

0 50 100 150 200 250 300 350 400 450 5004.85

4.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )

R1 = 931k , R 2 = 294k , L = 6.8 H, C FB = 2.2pF, T A = 25C

0 50 100 150 200 250 300 350 400 450 5004.85

4.9

4.95

5

5.05

5.1

IOUT (mA)

V O U T

( V )


VIN = 4.2V


TA = 25C TA = 85C

TA = 40C

TA = 40C

TA = 85C

0.5 1 1.5 2 2.5 3 3.5 4 4.54.85

4.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )


0.5 1 1.5 2 2.5 3 3.5 4 4.54.85

4.9

4.95

5

5.05

5.1

VIN (V)

V O U T

( V )


TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C





16/32

SC120

16

Typical Characteristics V OUT = 5.0V, High V IN Range (continued)

-50 -25 0 25 50 75 1004.85

4.9

4.95

5

5.05

5.1


C)

V O U T

( V )


-50 -25 0 25 50 75 1004.85

4.9

4.95

5

5.05

5.1


C)

V O U T

( V )


VIN = 4.2V

VIN = 3.6V

VIN = 3.0V VIN = 4.2V

VIN = 3.6V

VIN = 3.0V

0.5 1 1.5 2 2.5 3 3.5 4 4.50

20

40

60

80

100

120

140

VIN (V)

I O U T

( m A )

R1 = 931k , R 2 = 294k , L = 6.8 H, C FB = 2.2pF

0.5 1 1.5 2 2.5 3 3.5 4 4.50

20

40

60

80

100

120

140

160

VIN (V)

E q u

i v a

l e n

t R L

O A D (

)

R1 = 931k , R 2 = 294k , L = 6.8 H, C FB = 2.2pF

TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C

TA = 25C

TA = 85C

TA = 40C


Startup Max. Load Current vs. V IN (VOUT=5.0V, all V INs) Startup Min. Load Res. vs. V IN (VOUT=5.0V, all V IN Ranges)

0.5 1 1.5 2 2.5 3 3.5 4 4.50

50

100

150

200

250

300

350

400

450

500

VIN (V)

I O U T

( m A )

R1 = 931k , R 2 = 294k , L = 4.7 H, C FB = 2.2pF

TA = 25C

TA = 85C

TA = 40C

Maximum I OUT vs. VIN (VOUT = 5.0V, all V IN Ranges)


17/32

SC120

17

Typical Characteristics (continued)

Time = (10 s/div)

VOUT = 3.3V, VIN = 1.5V, IOUT = 20mA

VOUT ripple

(50mV/div)

IL

(100mA/div)

VLX(5V/div)

Time = (400ns/div)

VOUT = 3.3V, VIN = 1.5V, IOUT = 50mA

VOUT ripple

(10mV/div)

IL

(100mA/div)

VLX(5V/div)

Time = (100 s/div)

VOUT = 3.3V, VIN = 1.2V, TA = 25C

IOUT= 5mA to

100mA

(50mA/div)

VOUT

(100mV/div)

AC Coupled

Time = (100 s/div)

VOUT = 3.3V, VIN = 1.5V, TA =25C

IOUT= 40mA to

140mA

(50mA/div)

VOUT

(100mV/div)

AC Coupled

Load Transient (PSAVE to PWM) Load Transient (PWM to PWM)

PSAVE Operation PWM Operation

-50 -25 0 25 50 75 1000.8

0.825

0.85

0.875

0.9

0.925

0.95


C)

M i n i m u m

S t a r t u p V I N

( V )

Minimum Startup V IN vs. Temperature (Any V OUT)


18/32

SC120

18

Pin Descriptions

MLPD Pin # SOT23 Pin # Pin Name Pin Function

1 3 LX Switching node connect an inductor rom the input supply to this pin.

2 2 GND Signal and power ground.

3 1 INBattery or supply input requires an external 10 F bypass capacitor (capacitance evalu-ated while under V IN bias) or normal operation.

4 6 EN Enable digital control input active high.

5 5 FBFeedback input connect to GND or preset 3.3V output. A voltage divider is connected

rom OUT to GND to adjust output rom 1.8V to 5.0V.

6 4 OUTOutput voltage pin requires an external 10 F bypass capacitor (capacitance evaluatedwhile under V OUT bias) or normal operation.

T NA Thermal

Pad Thermal Pad (MLPD package only) is or heat sinking purposes connect to groundplane using multiple vias not connected internally.


19/32

SC120

19

Block Diagram

-

+

VREF1.2 V

Start-upOscillator

Gate Driveand

LogicControl

ErrorAmp.

-+

SlopeComp.

Oscillator andSlope

Generator

PWMControl

-

+

-

+

-

+

-

+

+-

CurrentAmplifier

P LIMAmp.

1.7 V

VOUTComp.IN

EN

FB

GND

LX

OUT

BulkBias

+-

NLIMAmplifier

PWMComp.

Output VoltageSelection Logic


20/32

SC120

20

Detailed Description The SC120 is a synchronous step-up Pulse WidthModulated (PWM) DC-DC converter utilizing a 1.2MHz

fxed requency current mode architecture. It is designedto provide output voltages in the range 1.8V to 5.0V roman input voltage as low as 0.7V, with a (output unloaded)start up input voltage o 0.85V.

The device operates in two modes: PWM and automaticPSAVE mode. In PWM operation, the devices uses pulsewidth modulation control to regulate the output undermoderate to heavy load conditions. It switches to PSAVEmode when lightly loaded. Quiescent current consump-tion is as little as 50 A, into the OUT pin, when in PSAVE

mode.

The regulator control circuitry is shown in the Block Diagram. It is comprised o a programmable eedback controller, an internal 1.2MHz oscillator, an n-channel Field E ect Transistor (FET) between the LX andGND pins, and a p-channel FET between the LX and OUTpins. The current owing through both FETs is monitoredand limited as required or startup, PWM operation, andPSAVE operation. An external inductor must be connectedbetween the IN pin and the LX pin. When the n-channel

FET is turned on, the LX pin is internally grounded, con-necting the inductor between IN and GND. This is calledthe on-state. During the on-state, inductor current ows

to ground and is increasing. When the n-channel FET isturned o and the p-channel FET is turned on (known asthe o -state), the inductor is then connected between IN

and OUT. The (now decreasing) inductor current owsrom the input to the output, boosting the output voltage

above the input voltage.

Output Voltage Selection The SC120 output voltage can be programmed to aninternally preset value or it can be programmed withexternal resistors. The output is internally programmedto 3.3V when the FB pin is connected to GND. Any outputvoltage in the range 1.8V to 5.0V can be programmedwith a resistor voltage divider between OUT and the FB

pin as shown in Figure 1.

The values o the resistors in the voltage divider network are chosen to satis y the equation

VRR

12.1V2

1OUT

.

A large value o R2, ideally 590k or larger, is pre erred orstability or VIN within approximately 400mV o V OUT. Forlower V

IN, lower resistor values can be used. The values o

R1 and R 2 can be as large as desired to achieve low quies-cent current.

Applications In ormation

L1

C IN

VOUT

IN

OUT

LX

EN

FB

SC120COUT

GNDR1

R2

CFB

Figure 1 Output Voltage Feedback Circuit


21/32

SC120

21

Applications In ormation (continued)PWM Operation The PWM cycle runs at a fxed requency ( osc = 1.2MHz),with a variable duty cycle (D). PWM operation continually

draws current rom the input supply (except or discon-tinuous mode, described subsequently). During the on-state o the PWM cycle, the n-channel FET is turned on,grounding the inductor at the LX pin. This causes thecurrent owing rom the input supply through the induc-tor to ground to ramp up. During the o -state, the n-channel FET is turned o and the p-channel FET(synchronous recti ier) is turned on. This causes theinductor current to ow rom the input supply throughthe inductor into the output capacitor and load, boostingthe output voltage above the input voltage. The cycle

then repeats to re-energize the inductor.

Ideally, the steady state (constant load) duty cycle isdetermined by D = 1 (V IN /VOUT), but must be greater inpractice to overcome dissipative losses. The SC120 PWMcontroller constrains the value o D such that 0.15 < D < 0.90(approximately).

The average inductor current during the o -state multi-plied by (1-D) is equal to the average load current. Theinductor current is alternately ramping up (on-state) and

down (o -state) at a rate and amplitude determined bythe inductance value, the input voltage, and the on-time(TON = DT, T = 1/ OSC). There ore, the instantaneous induc-tor current will be alternately larger and smaller than theaverage. I the average output current is su ciently small,the minimum inductor current can reach zero during theo -state. I the energy stored in the inductor is depleted(the inductor current decreases to zero) during the o -state, both FETs turn o or the remainder o the o -state.I this discontinuous mode (DM) operation persists, theSC120 transitions to PSAVE operation.

PSAVE OperationAt light loads, the SC120 will operate in PSAVE mode. Atlow output load, PSAVE mode will operate more e cientlythan PWM mode. PSAVE mode also ensures regulationwhile the output load is too small to keep the PWM modeduty cycle above its minimum value, especially when V IN is close to V OUT. PSAVE operation is triggered by 256 con-secutive cycles o DM operation in PWM mode, when the

output o the P LIMamplifer alls to 0V during the o -statedue to low load current.

PSAVE mode requires ewer circuit resources than PWMmode. All unused circuitry is disabled to reduce quies-cent power dissipation. In PSAVE mode, the OUT pinvoltage monitoring circuit remains active and the outputvoltage error amplifer operates as a comparator. PSAVEregulation is shown in Figure 2. When V OUT < 1.008xVREG,where V REG is the programmed output voltage, a burst o fxed-period switching occurs to boost the output voltage. The n-channel FET turns on (on-state) until the inductorcurrent rises to approximately 240mA. The n-channel FETthen turns o and the p-channel FET turns on to trans er

the inductor energy to the output capacitor and load orthe duration o the o -state. This cycle repeats untilVOUT > 1.018V REG, at which point both FETs are turned o . The output capacitor then discharges into the load untilVOUT < 1.008V REG, and the burst cycle repeats.

When the output current increases above a predeter-mined level, either o two PSAVE exit conditions will orcethe resumption o PWM operation. The frst PSAVE exitcriterion is shown in Figure 2. I the PSAVE burst cyclecannot provide su icient current to the output, the

output voltage will decrease during the burst. I VOUT< 0.98 VREG, PWM operation will resume. The secondPSAVE exit criterion, illustrated in Figure 3, depends onthe rate o discharge o the output capacitor betweenPSAVE bursts. I the time between bursts is less than 5 s,then PWM operation resumes. The output capacitancevalue will a ect the second criterion, but not the frst.Reducing the output capacitor will reduce the outputload at which PSAVE mode exits to PWM mode.

Within each on/o cycle o a PSAVE burst, the rate o

decrease o the inductor current during the o -state isproportional to (V OUT VIN). I VIN is su ciently close toVOUT, the decrease in current during the o -state may notovercome the increase in current during the minimumon-time o the on-state, approximately 100ns. This canresult in the peak inductor current rising above the PSAVEmode n-channel FET current limit. (Normally, when then-channel FET current limit is reached, the on-state endsimmediately and the o -state begins. This sets the dutycycle on a cycle-by-cycle basis.) This inductor current rise


22/32

SC120

22

Applications In ormation (continued)

VOUT+0.8%

+1.8%

PSAVE Mode atModerate Load

PWM Mode atHigh Load

-2%

BURSTOFF

(> 5 s)

Higher LoadApplied

0A

Inductor

Current

Time

ProgdVoltage

BURST PWM Mode

PSAVE exit due tooff-time reduction

240mA

OFF(< 5 s)

Figure 3 PSAVE Operation With Exit to PWM Due To O -time < 5s

VOUT+0.8%

+1.8%

PSAVE Mode atModerate Load

PWM Mode atHigh Load

-2%

BURST OFF

Higher LoadApplied

0A

Inductor

Current

Time

ProgdVoltage

BURST OFF BURST PWM Mode

PSAVE exit dueto output decay

240mA

Figure 2 PSAVE Operation With Exit to PWM Due To Output Voltage Decay


23/32

SC120

23

accumulates with each successive cycle in the burst. Theresult is that the output load current that can be sup-ported in PSAVE under this high V IN condition will be

greater than occurs i the 240mA current limit can been orced. There ore the PSAVE exit load due to the frstexit criterion (Figure 2) can increase signi icantly. Thisphenomenon is advantageous. Reverting to PWM opera-tion with high V IN can result in V OUT rising above V REG, dueto the PWM minimum duty cycle. PSAVE operation avoidsthis voltage rise because o its hysteretic voltage-thresh-old on/o control. I the load remains low enough toremain in PSAVE, VIN can approach and even slightlyexceed V OUT. To initally enter PSAVE mode, the initialstartup load must be small enough to cause discontinu-

ous mode PWM operation. This PSAVE mode startup loadupper limit can be increased i needed by reducing theinductance. (Re er to the Inductor Selection section.)Su ciently large output capacitance will prevent PSAVEexit due to the second exit criterion (Figure 3).

PSAVE VOUT ripple may increase due to parasitic capaci-tance on the external FB pin network. I using external

eedback programming, it is prudent to add a small capaci-tor between OUT and FB to the circuit board layout. Whenoperating the SC120 in the fnal confguration in PSAVE,

observe the amplitude o PSAVE ripple. I the rippleexceeds 50mV or the expected range o input voltage, asmall-value capacitor should be tried. Capacitance on theorder o a ew pico arads is o ten su cient to bring theripple amplitude to approximately 50mV.

In the case o low V IN and high V OUT, larger values o CFBmay be needed, perhaps 4.7pF or higher. I using theSOT23-6 package (SC120SKTRT) with low V IN and high V OUT,at least 10pF to 12pF is recommended.

The Enable Pin The EN pin is a high impedance logical input that can beused to enable or disable the SC120 under processorcontrol. V EN < 0.2V will disable regulation, set the LX pin ina high-impedance state (turn o both FET switches), andturn on an active discharge device to discharge the outputcapacitor via the OUT pin. V EN > 0.85V will enable theoutput. The startup sequence rom the EN pin is identicalto the startup sequence rom the application o inputpower.

Regulator Startup, Short Circuit Protection, andCurrent Limits The SC120 permits power up at input voltages rom 0.85V

to 4.5V. Startup current limiting o the internal switchingn-channel and p-channel FET power devices protectsthem rom damage in the event o a short between OUTand GND. As the output voltage rises, progressively less-restrictive current limits are applied. This protectionunavoidably prevents startup into an excessive load.

To begin, the p-channel FET between the LX and OUT pinsturns on with its current limited to approximately 150mA,the short-circuit output current. When V OUTapproaches V IN(but is still below 1.7V), the n-channel current limit is set

to 350mA (the p-channel limit is disabled), the internaloscillator turns on (approximately 200kHz), and a fxed75% duty cycle PWM operation begins. (See the sectionPWM Operation.) When the output voltage exceeds 1.7V,

ixed requency PWM operation begins, with the dutycycle determined by an n-channel FET peak current limito 350mA. When this n-channel FET startup current limitis exceeded, the on-state ends immediately and the o -state begins. This determines the duty cycle on a cycle-by-cycle basis. When V OUT is within 2% o the programmedregulation voltage, the n-channel FET current limit is

raised to 1.2A, and normal voltage regulation PWM controlbegins.

Once normal voltage regulation PWM control is initiated,the output becomes independent o V IN and output regu-lation can be maintained or V IN as low as 0.7V, subject tothe maximum duty cycle and peak current limits. The dutycycle must remain between 15% and 90% or the deviceto operate within specifcation.

Note that startup with a regulated active load is not the

same as startup with a resistive load. The resistive loadoutput current increases proportionately as the outputvoltage rises until it reaches programmed V OUT /RLOAD, whilea regulated active load presents a constant load as theoutput voltage rises rom 0V to programmed V OUT. Notealso that i the load applied to the output exceeds anapplicable V OUT dependent startup current limit or dutycycle limit, the criterion to advance to the next startupstage may not be achieved. In this situation startup may



24/32

SC120

24

pause at a reduced output voltage until the load is reducedurther.

Output Overload and RecoveryWhen in PSAVE operation, an increasing load will eventu-ally satis y one o the PSAVE exit criteria and regulationwill revert to PWM operation. As previously noted, thePWM steady state duty cycle is determined byD = 1 (VIN /VOUT), but must be somewhat greater in prac-tice to overcome dissipative losses. As the output loadincreases, the dissipative losses also increase. The PWMcontroller must increase the duty cycle to compensate.Eventually, one o two overload conditions will occur,determined by V IN, VOUT, and the overall dissipative losses

due to the output load current. Either the maximum dutycycle o 90% will be reached or the n-channel FET 1.2A(nominal) peak current limit will be reached, which e ec-tively limits the duty cycle to a lower value. Above thatload, the output voltage will decrease rapidly and inreverse order the startup current limits will be invoked asthe output voltage alls through its various voltage thresh-olds. How ar the output voltage drops depends on theload voltage vs. current characteristic.

A reduction in input voltage, such as a discharging battery,

will lower the load current at which overload occurs.Lower input voltage increases the duty cycle required toproduce a given output voltage. And lower input voltagealso increases the input current to maintain the inputpower, which increases dissipative losses and urtherincreases the required duty cycle. There ore an increase inload current or a decrease in input voltage can result inoutput overload. Once an overload has occurred, the loadmust be decreased to permit recovery. The conditionsrequired or overload recovery are identical to thoserequired or success ul initial startup.

Anti-ringing CircuitryIn PWM operation, the n-channel and p-channel FETs aresimultaneously turned o when the inductor currentreaches zero. They remain o or the zero-inductor-current portion o the o -state. Note that discontinuousmode is a marginal-load condition, which i persistent willtrigger a transition to PSAVE operation.

When both FET switches are simultaneously turned o , aninternal switch between the IN and LX pins is closed, pro-

viding a moderate resistance path across the inductor todampen the oscillations at the LX pin. This e ectivelyreduces EMI that can develop rom the resonant circuit

ormed by the inductor and the drain capacitance at LX.

The anti-ringing circuitry is disabled between PSAVEbursts.

Component Selection The SC120 provides optimum per ormance when a 4.7 Hinductor is used with a 10 F output capacitor. Di erentcomponent values can be used to modi y PSAVE exit orentry loads, modi y output voltage ripple in PWM mode,improve transient response, or to reduce component size

or cost.

Inductor Selection The inductance value primarily a ects the amplitude o inductor current ripple ( IL). Reducing inductanceincreases IL. This raises the inductor peak current,IL-max = IL-avg + IL /2, where I L-avg is the inductor current aver-aged over a ull on/o cycle. IL-max is subject to then-channel FET current limit I LIM(N), there ore reducing theinductance may lower the output overload current thresh-old. Increasing IL also lowers the inductor minimum

current, I L-min = IL-avg IL /2, thus raising the PSAVE entryload current threshold. This is the output load belowwhich I L-min = 0, the boundary between continuous modeand discontinuous mode PWM regulation, which signalsthe SC120 controller to switch to PSAVE operation. In theextreme case o V IN approaching V OUT, smaller inductancecan also reduce the PSAVE inductor burst-envelope currentripple and voltage ripple.

Equate input power to output power, note that inputcurrent equals inductor current, and average over a ull

PWM switching cycle to obtain

IN

OUTOUTavgL V

IV1I

where is e ciency.

IL is the inductor (and thus the input) peak-to-peak current. Neglecting the n-channel FET R DS-ON and theinductor DCR, or duty cycle D, and with T = 1/ osc ,



25/32

SC120

25

L TDV

dtVL1

I INDT

0INonL

This is the change in I L during the on-state. During theo -state, again neglecting the p-channel FET R DS-ON andthe inductor DCR,

D1L

TVVdtVV

L1

I OUTIN T

DTOUTINoff L

Note that this is a negative quantity, since V OUT > VIN and0 < D < 1. For a constant load in steady-state, the inductorcurrent must satis y IL-on + IL-o = 0. Substituting the twoexpressions and solving or D, obtain D = 1 V IN /VOUT.Using this expression, and the positive valued expressionIL = IL-on or current ripple amplitude, obtain expandedexpression or I L-max and I L-min.

INOUTOUT

IN

IN

OUTOUTmax,minL VVV

VL2

TV

IVI

I the value o IOUT decreases until I L-min = 0, which is theboundary o continuous and discontinuous PWM opera-tion, the SC120 will transition rom PWM operation to

PSAVE operation. De ine this value o I OUT as IPSAVE-entry.Setting the expression or I L-min to 0 and solving,

INOUT2

OUT

INentryPSAVE VVV

VL2 T

I

The programmed value o V OUT is constant. I PSAVE-entry is apolynomial unction o V IN. Equating dI PSAVE-entry /dVIN = 0and solving or V IN reveals that there is one non-zero extre-mum o this unction, a maximum, at V IN =

2 / 3 VOUT.*Applying this value o V IN,

OUTmaxentryPSAVE V272

L T

I

The value o the inductor determines the PSAVE entryoutput load current or a given V IN. Evaluate IPSAVE-entry at the

smallest and largest expected values o V IN. I the inputrange includes V IN =

2 /3 VOUT, also determine I PSAVE-entry-maxNote that at high V IN (VIN close to V OUT) PSAVE exit may

require an unusually high output load current. In thiscase, PSAVE re-entry may be o little concern. So i thelargest V IN exceeds approximately 90% o V OUT, insteadevaluate PSAVE entry at V IN = 0.9VOUT.

To ensure that I PSAVE-entry-max will be less than the PSAVE exitcurrent, evaluate the PSAVE-PWM mode transistions whileapplying increasing and decreasing loads with V IN at andabove 2 /3 VOUT. This should be done at the applicationslowest specifed ambient temperature as well as at roomtemperature. I the PSAVE exit current is not su ciently

greater than the PSAVE entry current, the separation canbe enhanced by increasing the output capacitance to raiseIPSAVE-exit due to the 5 s o -time criterion (see Figure 3), orby increasing the inductor value to reduce I PSAVE-entry.

The inductor selection should also consider the n-channelFET current limit or the expected range o input voltageand output load current. The largest I L-avg will occur at theexpected smallest V IN and largest I OUT. Determine thelargest allowable IL, based on the largest expected I L-avgthe minimum n-channel FET current limit, and the

inductor tolerance. Ensure that in the worst case,IL-avg + IL /2 < ILIM(N).

These calculations include the parameter , e iciencyE ciency varies with V IN, IOUT, and temperature. Estimate using the plots provided in this datasheet, or rom experi-mental data, at the operating condition o interest whencomputing the e ect o a new inductor value on PSAVEentry and I-limit margin.

Any chosen inductor should have low DCR, compared to

the R DS-ON o the FET switches, to maintain e iciency,though or DCR


26/32

SC120

26

ormance), will ensure correct modeswitching behavior.

For very low V IN (0.7V to 0.8V) such as is obtained with a

nearly-depleted single-cell alkaline battery), a smallervalue o inductance will help to ensure that PWM modewill switch to PSAVE mode as the load decreases. Thisconsideration may be o little importance in most applica-tions, as there is little energy remaining in such a deeplydischarged battery.

The ollowing table lists the manu acturers o recom-mended inductor options. The specifcation values shownare simplifed approximations or averages o many deviceparameters under various test conditions. See manu ac-

turers documentation or ull per ormance data.

Manu acturer/Part #

Value(H)

DCR()

RatedCurrent

(mA)

Tolerance(%)

DimensionsLxWxH(mm)

MurataLQM31PN4R7M00 4.7 0.3 700 20 3.2 x 1.6 x 0.95

CoilcraftXFL2006-472

4.7 0.7 500 20 2 x 2 x 0.6

Capacitor SelectionInput and output capacitors must be chosen care ully toensure that they are o the correct value and rating. Theoutput capacitor requires a minimum capacitance valueo 10 F at the programmed output voltage to ensure sta-bility over the ull operating range, and to ensure positivemode-switching hysteresis. The DC bias must be includedin capacitor derating to ensure the required e ectivecapacitance is provided, especially when consideringsmall package-size capacitors. For example, a 10 F 0805capacitor may provide su cient capacitance at low outputvoltages but may be too low at higher output voltages. There ore, a higher capacitance value may be required toprovide the minimum o 10 F at these higher output volt-ages. Additional output capacitance may be required orVIN close to V OUT to reduce ripple in PSAVE mode, to increasethe PSAVE exit threshold or high V IN, and to ensure stabil-ity in PWM mode, especially at higher output loadcurrents.

Low ESR capacitors such as X5R or X7R type ceramiccapacitors are recommended or input bypassing andoutput fltering. Low-ESR tantalum capacitors are not rec-ommended due to possible reduction in capacitance seen

at the switching requency o the SC120. Ceramic capaci-tors o type Y5V are not recommended as their tempera-ture coe cients and large capacitance tolerance make

them unsuitable or this application. The ollowing tablelists recommended capacitors. For smaller values andsmaller packages, it may be necessary to use multipledevices in parallel, especially or C OUT.

Manu acturer/Part Number

Value(F)

Rated Volt-age (VDC) Type

CaseSize

CaseHeight(mm)

MurataGRM21BR60J226ME39B

22 6.3 X5R 0805 1.25

MurataGRM31CR71A226KE15L

22 10 X7R 1206 1.6

Murata

GRM185R60G475ME154.7 4 X5R 0603 0.5

TDKC2012X5R1A226M 22 10 X5R 0805 0.85

Taiyo YudenJMK212BJ226MG-T 22 20 X5R 0805 1.25

PCB Layout ConsiderationsPoor layout can degrade the per ormance o the DC-DCconverter and can contribute to EMI problems, groundbounce, and resistive voltage losses. Poor regulation andinstability can result.

The ollowing simple design rules can be implemented toensure good layout:

Place the inductor and flter capacitors as closeto the device as possible and use short widetraces between the power components.Route the output voltage eedback path away

rom the inductor and LX node to minimizenoise and magnetic inter erence.Maximize ground metal on the component sideto improve the return connection and thermal

dissipation. Separation between the LX nodeand GND should be maintained to avoid cou-pling capacitance between the LX node and theground plane.Use a ground plane with several vias connectingto the component side ground to urther reducenoise inter erence on sensitive circuit nodes.

A layout drawing or the MLP package is shown in Figure 4and a layout drawing or the SOT23 package is shown inFigure 5.



27/32

SC120

27

GNDVIN

(2nd layer)

VOUT

LX

GND

IN

OUT

FB

EN

C IN

COUT

CFB

R2

R1

LX

8mm

5.5mmSC120


GND

VIN C IN

SC120 FB

ENIN

LX

LXR2

(2nd layer)

OUT

GND

7.0mm

5.2mmCFB R1

VOUTCOUT

Figure 4 Layout Drawing or MLP package

Figure 5 Layout Drawing or SOT23-6 package


28/32

SC120

28

(LASER MARK)INDICATOR

PIN 1

1

N

2

MIN

aaabbb

b

eLN

D

A1A

DIMMILLIMETERS

NOM

DIMENSIONS

MAXNOMINCHES

MIN MAX

A

A1

D1

E1

.035

.035.026 .031 0.800.65 0.90

0.90.055- - 1.40E .079 2.00

--

bxN

A2 (.006) (.152)

.055 .063 1.40 1.60

.075 .083 1.90 2.10

A2

LxN

D

E

E1

D1

NOTES:

CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).

COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.2.

1.

.003

.007

6

.010

.059

.000

.020

0.08

0.25

6

.012 0.18

.024

.002 0.000.50

0.301.50

0.050.60

.004 0.10

0.50 BSC.020 BSC0.30.012 .016.014 0.35 0.40

aaa C

SEATING

PLANE

A

bbb C A B

B

e

C

--

Outline Drawing MLPD-UT-6 1.5x2


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SC120

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Land Pattern MLPD-UT-6 1.5x2

K

H

.031

.051

0.80

1.30

.106

.020

.012

.030

2.70

0.30

0.75

0.50

(.077)

.047 1.20

(1.95)

NOTES:

2.

THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD

SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.

FUNCTIONAL PERFORMANCE OF THE DEVICE.FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR

INCHES

DIMENSIONS

G

K

H

X

Y

P

Z

C

DIM MILLIMETERS

(C) GZ

P

X

R .006 0.15

R

3.

Y

1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).

THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOURCOMPANY'S MANUFACTURING GUIDELINES ARE MET.


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SC120

30

aaa C

SEATING

ccc C2X N/2 TIPS

2X E/2

A1

AA2

bxN

1 2

N

E

6

0.20

1.603.10

2.80 BSC0.95 BSC

1.502.90

0.25

1.75

0.50-

E1 2.80

bbb C A-B D

0.10

0.20

0 - 10

1.15

(0.60)0.450.30

0.08

0.000.90

0.90

0.22

0.60

-

0.151.45

1.30--

1.90 BSC

A

e1 D

e

B

CPLANE

D

DATUMS AND TO BE DETERMINED AT DATUM PLANE

CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).

DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS3.OR GATE BURRS.

NOTES:1.

2. -A- -B- -H-

DIMENSIONS

L1

aaabbbccc

01N

DIM

c

ee1L

E1E

D

A1A2b

AMINMILLIMETERSNOM MAX

PLANEGAUGE

DETAIL

0.25

H

A

(L1)

L

01

c

SIDE VIEW

SEE DETAIL A

Outline Drawing SOT23-6


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SC120

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Land Pattern SOT23-6

YZ

DIM

GPX

CMILLIMETERS

1.40(2.50)

0.950.601.103.60

DIMENSIONS

YZ

GPX

C

THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOURCOMPANY'S MANUFACTURING GUIDELINES ARE MET.

NOTES:

2.

Y

ZG(C)

X

P

CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).1.


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Semtech CorporationPower Management Products Division200 Flynn Road, Camarillo, CA 93012

Phone: (805) 498-2111 Fax: (805) 498-3804

Contact In ormation

SC120

Semtech 2010

All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent o the copyrightowner. The in ormation presented in this document does not orm part o any quotation or contract, is believed to beaccurate and reliable and may be changed without notice. No liability will be accepted by the publisher or any conse-

quence o its use. Publication thereo does not convey nor imply any license under patent or other industrial or intellec-tual property rights. Semtech assumes no responsibility or liability whatsoever or any ailure or unexpected operationresulting rom misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stressincluding, but not limited to, exposure to parameters beyond the specifed maximum ratings or operation outside thespecifed range.

SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PIN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMERS OWN RISK. Should a purchase or use Semtech products or any such unauthorized application, the customer shall indemni y and holdSemtech and its o cers, employees, subsidiaries, a liates, and distributors harmless against all claims, costs damages

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