1 Applicazioni industriali delle radiazioni ionizzanti (Effetti della radiazione ionizzante nella...

1

Applicazioni industriali

delle radiazioni ionizzanti

(Effetti della radiazione ionizzante nella

Tecnologia CMOS)

Andrea Candelori

Istituto Nazionale di Fisica Nucleare and Dipartimento di Fisica, Padova

2

5A. MOS and MOSFET: a brief review

3

The MOS capacitor

MOS is the acronym of metal oxide semiconductor

G a te

b u lk co n ta c t

to x

4

The MOS capacitor band diagram

Ef is the fermi levelEg is the energy gapEc is the conduction band energy levelEv is the valence band energy level is the electron affinity is the work functionq is the potential barrier

E g,ox= 9 eV

E c,ox

E v,ox

E g ,S i= 1 .1 eV E f,S i

E i,S iE c,S i

E v,S i

q · = 0 .95 eVo xq · = 4 .05 eVS iq · = 4 .1 eV m

q · S i

q ·m ,h= 5 .9 e V

q ·m ,e= 3 .1 5 e V q ·S i,e= 3 .1 5 e V

q ·S i,h = 4 .8 e V

q ·S i,eE f,m

E o

5

The MOS capacitor band diagram (accumulation and depletion)

n-type silicon

electron accumulationclose to the SiO2/Si interfacens>Nd

Vg>0

Vg<0

electron are pushed backfrom the SiO2/Si interfaceleaving the donor ionizedns<Nd

6

Vg=VT<0 donor are ionized

The MOS capacitor band diagram (accumulation and depletion)

holes are attractedat the SiO2/Si interfacehs=Nd

Vg<VT<0 n-type silicon

7

The MOS capacitor band diagram

Flatband

Accumulation

Depletion

Inversion

8

MOSFET

MOSFET is the acronym of Metal Oxide Semiconductor Field Effect Transistor

Applets: http://jas.eng.buffalo.edu/education/mos/mosfet/mosfet.html

9

N-channel MOSFET (conduction is due to electrons)

GS D

B

p

n+ n+

VG=VT>0

The silicon at the SiO2/Si interface is in strong inversion (n=Na), and a conductive channel of electrons is formed between source and drain.

GS D

B

p

n+ n+

The n-MOSFET threshold voltage (VT>0) is the voltage which has to be applied to the gate in order to form a conductive channel (electrons) between source and drain.

10

P-channel MOSFET: conduction is due to holesG

S D

B

n

p+ p+

GS D

B

n

p+ p+

VG=VT<0

The silicon at the SiO2/Si interface is in strong inversion (p=Nd), and a conductive channel of holes is formed between source and drain.

The p-MOSFET threshold voltage (VT<0) is the voltage which has to be applied to the gate in order to form a conductive channel (holes) between source and drain.

11

Measurement of the MOSFET threshold voltage

Threshold voltage (VT) for the p-MOSFET at the input at the APV-25 read-out electronics.

0.00

0.03

0.06

0.09

0.12

0.15

0.0 0.4 0.8 1.2|VG|=|VD| (V)

|I D|1/

2(A

1/2 )

|VT|=0.416 V

GS D

B

n

p+ p+

VG=VD<0is variable

A

ID

Oxide thickness 5.5 nmW=2000 mL=0.36 m

12

MOSFET operation in sub-threshold

1E-15

1E-13

1E-11

1E-9

1E-7

1E-5

1E-3

1E-1

-1.2-1.0-0.8-0.6-0.4-0.20.00.20.4VG (V)

|I D| (

A)

VD=-50 mV

GS D

B

n

p+ p+

VG is variableVT<VG<0 ID

VD=-50 mVA

Sub-threshold

Above-threshold

Threshold

Sub-threshold curve for the p-MOSFET at the input at the APV-25 read-out electronics.

13

MOSFET operation above threshold

Linear regionVG>VT and VD<VG

Pinch-off conditionVG>VT and VD=VG

Saturation regionVG>VT and VD>VG

VG>VT and VG is fixed

B

B

B

14Output curve for the p-MOSFET at the input at the APV-25 read-out electronics.

MOSFET operation above threshold

0

10

20

30

0.0 0.2 0.4 0.6 0.8 1.0 1.2|VD| (V)

|I D| (

mA

)

VG=-0.40 VVG=-0.50 VVG=-0.60 VVG=-0.85 VVG=-1.00 VVG=-1.20 V

GS D

B

n

p+ p+

VG is fixedVG<VT<0 ID

VD is variableA

15

The MOSFET as an amplifier

G

S

D

B

np+

p+

R

VOUT

VDD

VIN

VG

0

10

20

30

40

50

-1.0-0.8-0.6-0.4-0.20.0VG (V)

|gm

| (m

S)

VD=-50 mV, AsRec

VD=-250 mV, AsRec

VD=-450 mV, AsRec

VD=-650 mV, AsRec

VD=-850 mV, AsRec

VD=-1050 mV, AsRec

VOUT=VINgmRD

gm=IDS/VG

Trans-conductance

16

5B. Radiation Effects in thick oxide (>10 nm)

17

Materials for study

1) T.R. Oldham and F. B. McLean, "Total Ion ionizing Dose Effects in MOS Oxides",IEEE Trans. Nucl. Sci., vol 50, n.3, June 2003, pp. 483-499, and references therein.

2) J. R. Schwank et al., "Radiation Effects in MOS Oxides",IEEE Trans. Nucl. Sci., vol 55, n.4, August 2008, pp. 1833-1853, and references therein.

3) J. R. Schwank et al., "Radiation Effects in MOS Oxides",IEEE Trans. Nucl. Sci., vol. 50, n. 3, June 2003, pp.522-538.

4) R. C. Lacoe., "Improving Integrated Circuits Performance Through the Application of Hardness-by-design Methodology",IEEE Trans. Nucl. Sci., vol. 55, n. 4, August 2008, pp.1903-1925.

5) G. Anelli et al., "Radiation Tolerant VLSI Circuits in Styandard Deep Submicron CMOS Technologies for the LHC Experiment: Practical Design Aspects",IEEE Trans. Nucl. Sci., vol. 46, n. 6, December 1999, pp.1690-1696.

18

MOSFET: the gate oxide

n-MOSFET before irradiation:electron channel: VT>0

n-MOSFET after irradiation:positive oxide charge trapped in the oxide, VT decreases and becomes negative. Also at VGS=0 V the electron channel is formed.

19

The MOSFET sensitive parts to radiation

G

S D

B

n

p+ p+

SiO2 toionizing radiationSiO2/Si interface

to ionizing radiation

The substrate can be sensitive to bulk damage, but this effect is less relevant because the conduction is close to the SiO2/Si surface

20

The MOSFET sensitive parts to radiation

G

S D

B

p

n+ n+

SiO2 toionizing radiationSiO2/Si interface

to ionizing radiation

The substrate can be sensitive to bulk damage, but this effect is less relevant because the conduction is close to the SiO2/Si surface

21

Ionizing radiation in SiO2: p-MOSFET threshold voltage

VT<0: channel of holes

22

Ionizing radiation in SiO2: n-MOSFET threshold voltage

VT>0: channel of electrons

23

MOSFET: the gate oxide

Which are the physical mechanisms governing radiation damage in Silicon Oxide (SiO2)?

Which is the dependence of these mechanisms considering the following experimental parameters?-Oxide thickness.-Time.-Electric field in the oxide.-Temperature.

We will consider first the results of investigations forthick oxide (>10 nm), whose thicknesses are typical for old technologies (2000) and nowadays field oxides.

24

Ionizing radiation in SiO2 and defect generation mechanisms (1)

-When radiation passes through the oxide electron/hole pairs are created by the deposited energy.-In SiO2 electrons are much more mobile than holes, and they are swept out of the oxide typically in picoseconds or less. However in the first picosecond some fraction of the electrons and holes will recombine, depending on the energy and type of the impinging radiation.-Holes escaping recombination are relatively immobile and remain near the point of the generation causing the initial negative threshold voltage shift.

VG>0

25


(1) The initial negative threshold voltage shift described in the previous slide.

26


-The transport of the holes to the SiO2/Si interface causes a short term recovery of the threshold voltage: this process takes place over may decades of times and is very sensitive to the electric field, temperature, oxide thickness and process history (<1 s at RT, orders of magnitudes slower at low temperature).

VG>0

27


(2) The short recovery of the initial negative threshold voltage shift, due to the transport of holes to the SiO2/Si interface, described in the previous slide.

28


-When holes are close to the SiO2/Si interface a fraction is trapped in relatively deeplong-lived trap sites. The trapped holes cause a remnant negative voltage shift which can persist for hours or even for years. But even these stable trapped holes undergo a gradual annealing.

VG>0

29


(3) The remnant negative threshold voltage shift due to hole trapping in deep long-lived sites close to the SiO2/Si interface.

30


-Generation of interface states at the SiO2/Si interface. These defects introduce energy levels in the Si band-gap, whose occupancy depends on the Fermi level at the SiO2/Si interface, which in turn depends on the applied gate voltage: consequently they cause a threshold voltage shift which varies depending on the applied gate voltage. -Interface states in the upper part of the band-up are acceptor (can trap electrons and are relevant for n-MOSFET: VT increases).-Interface states in the lower part of the band-up are donors (can emit electrons and are relevant for p-MOSFET: VT decreases).

VG>0

31


(4) The positive threshold voltage shift due to interface states at the SiO2/Si interface in n-MOSFET (VT decreases due to the contributions from the oxide charge, VT increases due to the contributions from the interface states in the upper part of the band-gap which are negative charged)

32


14 orders of magnitude for time:1 day: 8.6·104 s1 month: 2.6 ·106 s1 year: 3.15·107 s

In n-MOSFET, the long-term threshold voltage shift is positive(rebound effect) due to negative trapped charge in interface states.

33

Electron-hole pairs generation in SiO2

The mean energy to create and electron hole pair in SiO2 is: (17 ± 1) eV [1986].

The electron-holes pairs created in the volume of 1 cm3 by the dose of 1 rad is8.1·1012. We define g0= 8.1·1012 e-h/(cm3·rad)

Volume (V)

Dose (rad)

SiO2

DVradcm

heDVgN he

312

0 101.8

Dtradcm

heDtg

cm

heN oxoxhe

312

02101.8

34

Initial hole yield

-Ionizing radiation generates electron-hole pairs in SiO2.-Electrons are swept out of the oxide very rapidly (1 ps or less), but in that time some fraction of electrons recombine with holes.-The fraction of holes surviving recombination depends on:

a) the magnitude of electric field in the oxide(operative condition of the device);b) the initial electron-hole pairs density in the oxide(the LET of the impinging radiation or primary electrons).

)(101.8)( ,312

,0 RadiationEfDVradcm

heRadiationEfDVgN oxoxh

),(101.8

),(

312

02

RadiationEfDtradcm

he

RadiationEfDtgcm

heN

oxox

oxoxhe

35

Initial hole yield: geminate and columnar recombination modelsGeminate recombination model (can be applied for electron and Co60 irradiation):a) The average separation distance between electron-hole pairs is higher than the thermalization distance.b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.c) Electrons and holes drifts in opposite direction due to the electric field.d) Electrons and holes moves randomly due to thermal fluctuations of the system.c) The interactions with other electron-hole pairs can be neglected.

Columnar recombination model (can be applied for heavy ions (Z>1)):a) The average separation distance between electron-hole pairs is lower than the thermalization distance: there are several electrons closer to any given hole than the electron, which was its original partner.b) The recombination probability is higher for the columnar model than for geminate model.

36

Geminate recombination model (can be applied for electron and Co60 irradiation):a) The average separation distance between electron-hole pairs is higher than the termalization distance.b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.c) Electrons and holes drifts in opposite direction due to the electric field.d) Electrons and holes moves randomly due to thermal fluctuations of the system.c) The interactions with other electron-hole pairs can be neglected.

Initial hole yield: geminate recombination model

-The fraction yield for holes . . . . . . by increasing the oxide electric field.-The maximum value of the fraction yield for holes at 2.5 MV/cm is . . . -At 1 MV/cm the fraction yield for holes is . . .

nmcm

MVdEV 1001

Vcmcm

V1010

101 5

6

37

Columnar recombination model (can be applied for heavy ions (Z>1)):a) The average separation distance between electron-hole pairs is lower than the termalization distance: there are several electrons closer to any given hole than the electron, which was its original partner.b) The recombination probability is higher for the columnar model than for geminate model.

Initial hole yield: columnar recombination model


nmcm

MVdEV 1001

Vcmcm

V1010

101 5

6

2 MeV particle B is the radius at half-maximum for the Gaussian charge distribution of the 2 MeV particle: i.e. 1.178·.

38

Initial hole yield for different radiations [1983]

Experimental values of the fractional yield for holes as a function of the oxide electric field for different radiations

Geminatemodel

Columnarmodel

Co60 -rays and 10 keV X-ray sources: which is the better solution for radiation damage due to electrons in Van Allen Belts?

Intermediate condition

39

Initial hole yield for different radiations

The fractional yield for holes as a function of the proton energy:

-at low proton energy: columnar model-at high proton energy: geminate model

Linear Energy Transfer for different radiations(values for 10 keV X-rays and Co60 -rays are for primary electrons) [2002]:

- geminate model applied at low dE/dx;

- columnar model applied at high dE/dx;

-10 keV X-rays simulates 20-60 MeV protons;

- Co60 -rays simulates 1 MeV electrons;

40

Hole transport in SiO2 (1)

Hole transport occurs over many decade of times after the radiation pulse.1) Changes in temperature does not charge the "S" shape of the recovery curve(VFB vs time). At temperature higher than -130 ºC the hole transport is strongly temperature activated.

-Oxide thickness:tox=96.5 nm-Radiation:LINAC 12 MeV electron pulse (30 krad)(geminate model)-Oxide electric field:1 MV/cm

)0(

)(

FB

FB

V

tV

Flat band voltage variation after irradiation as a function of time.

Flat band voltage variation just after the LINAC electron pulse.

16.6 min

1978

41


Hole transport occurs over many decade of times after the radiation pulse.2) Changes in the oxide electric field does not charge the shape of the recovery curve (VT vs time). The hole transport is activated by the oxide electric field.

)0(

)(

FB

FB

V

tV



16.6 min

-Oxide thickness:tox=96.5 nm-Radiation:LINAC 12 MeV electron pulse (30 krad)(geminate model)-Temperature:80 K

1978

42


Hole transport occurs over many decade of times after the radiation pulse.3) Changes in the oxide thickness does not charge the shape of the recovery curve (VT vs time) but the hole transport time has a super linear power law dependence on the oxide thickness.

2

1

)0(

)( 2/1

FB

FB

V

tV

The "hole transit time" tTR is the time at which:

-Oxide thickness:tox=96.5 nm-Radiation:LINAC 12 MeV electron pulse (30 krad)(geminate model)

)( oxTR tct

1978

43


Proposed mechanisms for hole transport in SiO2:-Continuous-time-random-walk (CTRW) hopping (hopping of holes between localized shallow trap states having a random spatial distribution, but having an average separation of about 1 nm);-Multiple-trapping model.

2

1

)0(

)( 2/1

FB

FB

V

tV

The "hole recovery time" t1/2 is the time at which:

1978

)0(

)(

FB

FB

V

tV



The "S" shape of the recovery curve is . . .The data can be fitted by . . .

Eox=1 MV/cm

-Oxide thickness:tox=96.5 nm-Radiation:LINAC 12 MeV electron pulse (30 krad)(geminate model)

44

5C. Radiation effects in SiO2:microscopic considerations

45

-The silicon oxide used in microelectronic applications is composed by tetrahedral SiO4 blocks, but they are irregular: the SiO2 structure is not crystalline but amorphous (a-SiO2).-The SiO4 blocks are connected by Si-O-Si bridging bonds, as shown in the following figure, the corresponding formula is O3Si-O-SiO3. In a-SiO2, the Si-O-Si bonds are strained: the angle between the oxygen and the two Si neighbours can assume values between 120° and 180°.

Silicon oxide (SiO2)

Two tetrahedral SiO4 blocks and the oxygen bonding the two silicon atoms.

46

Microscopic defects in SiO2: the oxygen vacancy

-The oxygen vacancy (Vo) is a structure of fundamental importance for defect studies in SiO2. The Vo defect is obtained by removing the oxygen bonding two Si atoms, as shown in the following Figure.-It is schematically represented by the formula: O3Si-SiO3. When the oxygen is removed, the c-SiO2 structure relaxes: the two silicon atoms move to the oxygen vacancy by near equal amount along the Si-O direction.The oxygen vacancy density can be high up to 6·1019 cm-3, in oxides thermally grown in oxygen reach atmosphere (dry oxide).

The SiO2 structure (left). The oxygen vacancy defect (right).

47

Hole trapping and annealing in SiO2

Holes are trapped close to the SiO2/Si interface because there is a transition region where oxidation is not complete, this region contains excess Si atoms, i.e. "Oxygen vacancy defects".

(a) "Oxygen vacancy": a Silicon atom is back bonded to three Oxygen atoms and with a weak bond to a Silicon atom.

(d)

(e)

48


(b) When a hole is trapped by a "Oxygen vacancy" the Si-Si bond is broken and the lattice relaxes to the E’ center: the first Silicon atom is positive charged and back bonded to three Oxygen atoms, the second Silicon atoms is neutral and back bonded to three Oxygen atoms. The E’ center is a positively charge defects which is detectable by ESR (Electron Spin Resonance).

(d)

(e)

49

The positive charge oxygen vacancy

-The bonding between the two Si atoms of the Vo defect can be broken by

exciting a bonding electron to the SiO2 conduction band or by hole trapping.

-The new defect, is called positive charged oxygen vacancy (Vo+). It is

represented by the chemical formula: O3Si°SiO3, where the symbols "" and "°" are the unpaired electron and the trapped hole, respectively.-The Vo+ center is positive charged (°SiO3) and paramagnetic (O3Si). It can be characterized by the electron-spin-resonance (ESR) technique. The paramagnetic part of the Vo

+ defect is called E' center.

The positive charged oxygen vacancy defect. The arrow indicates the unpaired electron of the neutral Si atom. The Vo

+ defect is strongly correlated to the positive charge induced by ionising radiation.

50


(c) Trapped holes are relatively stable but they can undergo a long-term annealing which can extend from hours to years. The microscopic mechanism for the annealing of the trapped hole: at room temperature is electron tunneling from the Si substrate and at higher temperature is electron thermal excitation from the Si substrate valence band: an electron can be trapped by the neutral Silicon atom back bonded to the three Oxygen atoms, becoming negative and compensating the positive charge of the other Si atom back bonded to three Oxygen atoms. This effects is enhanced for positive gate bias: VG>0 V.

(d)

(e)

VG>0

51


(d) Depending on the local microscopic strain of the two Si atoms, the weak Si-Si bond can be reformed coming from (c) to (a): true annealing of the trapped holes.

(e) Depending on the local microscopic strain of the two Si atoms, the weak Si-Si bond can not be reformed coming from (c) to (b) when a negative gate bias VG<0 is applied: neutral electron trap, which can emit the trapped electron for VG<0(from (c) to (b)) and which can trap an electron for VG>0 (from (b) to (c)).

(d)

(e)

VG<0

52

Vot


(d)

(e)

-Oxide thickness:tox= 45 nm-Radiation source:Co60 -rays-Bias during irradiationVGS=10 V

1984

VG>0

VG<0

53


(d)

(e)

VG>0: Trapped hole annealing: electron tunneling from the Si substrate, from (b) to (c).

VG<0: Si-Si weak bond reformation (true annealing of the trapped holes) from (c) to (a); Reverse annealing (electron tunneling back from neutral electron traps to the Si substrate) from (c) to (b).

Annealing of the midgap voltage variation (Vmg ) for MOS capacitors. Vmg depends on the oxide trapped charge:-Vmg negative => positive oxide trapped charge (Vmg decreases: positive trapped charge increases; Vmg increases: positive trapped charge decreases).

VG>0

VG<0

54


The neutral electron trap, which can be positive charged or neutral and are close to the SiO2/Si interface are also called border traps.

MOS capacitor with p-substrate and VG>0. In the Figure are shown the interface states and the neutral electron traps close to the SiO2/Si interface which can be positive charged or neutral.

55

Positive and negative charge trapping in SiO2

Oxygen vacancy (A). Positive charged oxygen vacancy (B). Unstable state (C). Oxygen vacancy after bond reformation (D). Neutral compensated defect (E). Fixed negative charge (F).

o oS i

o

o oS i

o

o oS i

o

o oS io

o oS i

o

o oS i

o

o oS i

o

o oS i

o

o oS i

o

o oS i

o

o oS i

o

o oS i

o

O x ig en v a ca n c y

O x ig en v a ca n c y

+ h h o le tra p p in g



+ ee lec tro n tr a p p in g

+ ee lec tro n tr a p p in g

P o sit iv e ch a rg ed o x y g en v a c a n cy

U n sta b le s ta te n o t o b serv ed

e lec tro n red is tr ib u tio n n o b o n d re fo rm a tio n

e lec tro n red is tr ib u tio n b o n d re fo rm a tio n

N eu tra l co m p en sa ted d e fec t F ix ed n e g a tiv e ch a rg e

(A )

(B )

(C )

(D )

(E ) (F )

56

Interface states

Interface states are identified with the Pb0 center, i.e. a Si atom which isback-bonded to three Si atoms and with a dangling bond.

This defect is amphoteric:

1) donor type in the lower part of the Si bandgap: -if the Fermi level is higher than midgap the defect is neutral -if the Fermi level is lower than midgap the defect emits an electron and becomes positive charge (positive charge trapping relevant for p-MOSFET)

2) acceptor type in the upper part of the Si bandgap: -if the Fermi level is higher than midgap the defect traps an electron and becomes negative charged (negative charge trapping relevant for n-MOSFET) -if the Fermi level is lower than midgap the defect is neutral.

57

qB

P b : S i S i P b + : S i S i° (d o n o r) 3 3

P b : S i S i P b - : S i S i (a cce p to r ) 3 3

Interface states

-The Pb center is a trivalent Si defect at the SiO2/Si interface: i.e., a silicon atom bonded to three other Si atoms with an unpaired electron in an orbital pointing out to a vacancy. It is represented by the chemical formula Si3Si.-The Pb defect is amphoteric, that is its charge condition can be positive, negative or neutral.

The donor (close circles) and acceptor (open circles) Pb centersin the Si band-gap at midgap condition for a MOS on n-Si substrate.

58

qB



Interface traps

-The Pb centers whose energy level is in the lower part of the Si band-gap are donor interface states: at midgap they are neutral and paramagnetic (Pb: Si3Si), if the Fermi level in the Si substrate moves to the Si valence band edge (Vg<0), they emit the trapped electron and become positive charged and diamagnetic (Pb+: Si3Si).-The Pb centers whose energy level is in the upper part of the Si band-gap are acceptor interface states: at midgap they are neutral and paramagnetic (Pb: Si3Si), if the Fermi level in the Si substrate moves to the Si conduction band edge, (Vg>0) they trap an electron from the Si substrate and become negative charged and diamagnetic (Pb-:Si3Si ).


59

Interface states

-When the SiO2 layer is grown at the SiO2/Si interface there are 1013 cm-3

Si atoms, each back-bonded to three Si atoms, with a dangling bond:Si3Si, which are neutral interface states.

-In the subsequent processing, almost all these centers are passivated by reacting with Hydrogen, which saturates the Si dangling bond: Si3Si.

-However they can be depassivated by radiation and/or electrical stress giving rise to neutral interface states: Si3Si

-Two stage model for radiation induced interface states:

1) In SiO2, due to H2 atmosphere processing steps, neutral Hydrogen is present. In the fist stage radiation induces holes cause positive hydrogen ions (protons) in the oxide;

2) In the second stage, protons undergo hopping transport under positive gate bias, and when they reach the SiO2/Si interface, they interact with the passivated trivalent Si centers (Si3Sigiving rise to an interface states and an Hydrogen molecules (by capturing an electron):Si3SiH2.

60

Defect classification in SiO2

G a te

b u lk co n ta c t

to x

The MOS capacitor. The classification of the defects in the SiO2/Si system,depending on their location (a) and electrical behaviour (b).

-Location: oxide traps, border traps and interface traps-Electrical behavior: fixed states (positive and negative charge or neutral) switching states (can exchange charge by tunneling)

61

Ionizing radiation in SiO2: summary

(a) Before irradiation.(b) During irradiation: electrons and holes are generated by ionizing radiation.(c) Electrons are sweep out in picoseconds, under Vg>0 holes slowly moves to the SiO2/Si interface.(d) Holes are trapped in SiO2 close to the SiO2/Si interface. Interface states are created at the SiO2/Si interface.

Effects of the positive oxide trapped charge and of the charge trapped in the interface states on the threshold characteristics ofp-MOSFET and n-MOSFET.

62

5D. The rebound effect in n-MOSFETsand ELDRS in BJT

63

The rebound effect

Positive charge trapping: VT<0 (VT decreases)Negative charge trapping: VT>0 (VT increases)

p-MOSFET1) Oxide trapped charge is positive:Vot contribution to VT=> VT<02) Positive trapped charge in interface states for p-MOSFET:Vit contribution to VT=> VT<0The two contributions have the same sign.

n-MOSFET1) Oxide trapped charge is positive:Vot contribution to VT=> VT<03) Negative trapped charge in interface states for n-MOSFET:Vit contribution to VT=> VT>0The two contributions have opposite sign.

64

The rebound effectn-MOSFET1984

-Oxide thickness:tox= 45 nm-Radiation source:Co60 -rays-Bias during irradiationVGS=10 V

VT

1) Which is the trend for VT during irradiation and annealing?2) Which is the trend for Vit during irradiation and annealing?3) Which is the trend for Vot during irradiation and annealing?4) Which is the effect of the annealing temperature increase on the oxide charge?5) Which is the effect of the annealing temperature increase on the interface states?

65

The rebound effect

Interface state buildup occurs on time frames much slower than oxide charge build up.Example in the figure: the time for reaching 50% build up is 35 s for the 5 pulse curve, but the interface state buildup does not begin to saturate up to 105 s (27.8 hours).

Si bandgap 1.12 eV

-Oxide thickness:tox= 47 nm-Oxide electric field1 MV/cm-Pulse repetition rate:4 Hz

Time after the end of the irradiation (s)

Orders of magnitude for time:1 day: 8.6·104 s1 week: 6.05 · 105 s1 month: 2.6 ·106 s1 year: 3.15·107 s

66

The rebound effect

)/(

)/(0

2

2

)(1 InterfaceSiSiOtox

InterfaceSiOGateox

itox

oxitoxT C

Qxdxx

CVVV

Gate

bulk contact

tox0

At high dose rates, taking into account that: the interface state buildup occurs on time frames much slower than oxide charge buildup, Vox predominates on Vit:in n-MOSFET Vox<0 predominates on Vit>0: VT<0(Laboratory testing)

At low dose rates, taking into account that: the interface state buildup occurs on time frames much slower than oxide charge buildup, and the annealing of the positive oxide trapped charge, Vit predominates on Vox :in n-MOSFET Vit>0 predominates on Vox<0: VT>0(Space environment)

At intermediate dose rates, taking into account that: the interface state buildup occurs on time frames much slower than oxide charge buildup, and the annealing of the positive oxide trapped charge, Vit and Vox are comparable:in n-MOSFET Vox>0 compensates Vit<0: VT0

67

Apparent dose rate effects1984

Low dose rates:n-MOSFET, failure due to

interface statesand negative charge trapping therein

VTVit>0(at low dose rates, the oxide positive charge anneals)

High dose rates:n-MOSFET, failure due to

oxide positive charge trappingVTVot<0

(long times and proton transport is required forinterface state activation by SiSi H depassivation)

Intermediate dose rates:In n-MOSFET compensation for the

contribution from-Oxide positive trapped charge Vot

-Negative charge trapped in interface states Vit>0

VT=Vot+Vit

68

In the space environments, electronic components are typically exposed to relative low dose rates for very long mission times:-the positive oxide trapped charge anneals;-the interface states buildup.

In order to compare the radiation induced degradation by Laboratory testing (at high dose rates) for prediction in the Space environments (low dose rates) after irradiation devices are annealed at 100ºC for 1 week to anneal the positive oxide trapped charge and to complete the interface state build-up.

The rebound effect

69

ESA ESCC Basic Specification 22900

The rebound effect: 100º for 168 h (1 week): 100ºC is a compromise because this temperature is not high enough to accelerate trapped hole annealing, but if one goes much higher temperature, the interface states may anneal too.

70

-La carica positiva intrappolata nell’ossido tra base ed emettitore causa un aumento dell’ampiezza della regione di svuotamento nelle zone p/p- della base all’interfaccia SiO2/Si.-Gli stati interfacciali all’interfaccia SiO2/Si dell’ossido tra base ed emettitore provocano un aumento nella generazione di portatori della regione di svuotamento nelle zone p/p- della base all’interfaccia SiO2/Si.

-La conseguenza è un aumento della corrente di base IB e quindi una diminuzione del parametro =IC/IB del transistor.-Tale effetto, che si manifesta a bassi ratei di dose (rad(SiO2)/s), viene chiamato "Enhanced Low Dose Rate Sensitivity " (ELDRS) ed è particolarmente rilevante per i BJT in applicazioni spaziali.

Enhanced Low Dose Rate Sensitivity (ELDRS)

Sezione di un BJT p-n-p

71

Enhanced Low Dose Rate Sensitivity (ELDRS)

In BJT technology the degradation induced by ionizing radiation, estimated by Laboratory testing (high dose rates) even after the 100ºC annealing for 1 week, underestimates the degradation induced by the Space environments (low dose rates): Enhanced Low Dose Rate Sensitivity (ELDRS).

ELDRS is due positive charge trapping in the oxide which modify the oxide electric field and the subsequent spatial distribution of the trapped holes (Space Charge effects in the oxide) and lowering the annealing rates at low dose rates.

72

Apparent dose rate effects [opzionale]

1988

-Oxide thickness:tox= 60 nm-Bias during irradiationand annealing:VGS=6 V

-Identical samples were exposed to the same dose (100 krad), with the dose rate varied over 11 orders of magnitude.-The threshold voltage variation, due to the oxide positive trapped charge, as a function of the total time (the sum of the irradiation time and of the annealing time) is the same.

Vit is positive and iincreases with time:-the interface states are positively or negatively charged? -the interface states density increases or decreases?

n-MOSFET or p-MOSFET?

73


1988

-Oxide thickness:tox= 60 nm-Radiation source:Co60 -rays-Bias during irradiationand annealing:VGS=6 V

-Identical samples were exposed to the same dose (100 krad), with the dose rate varied over 11 orders of magnitude.-The threshold voltage variation, due to the oxide positive trapped charge, as a function of the total time (the sum of the irradiation time and of the annealing time) is the same.

Vot is negative and decreases with time:-the oxide charge is positive/negative?-the oxide charge decreases/increases?


74


1988

-Oxide thickness:tox= 60 nm-Radiation source:Co60 -rays-Bias during irradiationand annealing:VGS=6 V

-Identical samples were exposed to the same dose (100 krad), with the dose rate varied over 11 orders of magnitude.-The threshold voltage variation as a function of the total time (the sum of the irradiation time and of the annealing time) is the same.

-At high dose rates, the main contribution to Vot is due to…-At low dose rates, the main contribution to Vot is due to…A-t intermediate dose rates, the main contribution to Vot is due to…


75

Thermal oxidation of silicon is usually performed at high temperature(800°C-1200°C): High Temperature Oxide layer (HTO): Oxidant: a) water vapor (H2O: wet oxide); b) molecular oxygen (O2 dry oxide).

Oxide hardening

22 SiOOSi 2222 HSiOHOSi

noxox tV

noxit tV

Wet oxides are more radiation hard for what concerns the positive oxide trapped charge.No significant improvement appears for interface states.

76

High temperature annealing (>800ºC) can cause a decrease in oxide hardening for what concern the positive oxide trapped charge.

Oxide hardening

Processing in H2 atmosphere after the deposition of the polysilicon gate material can cause a decrease in oxide hardening for what concern the interface states.

77

5E. Radiation Effects in thin oxide (<10 nm)

78

Device scaling

In the figures the VT for n-MOSFET produced by different commercial technologies (AMI 1.6 m, Orbit 1.2 m, HP 0.8 m, HP 0.5 m, HP 0.35 m, TSMC 0.25 m, TSMC 0.18 m) is reported.

What can be observed?Why it happens?

79

Device scaling

80

Device scaling

In 1985: gate oxide thickness: 100 nmIn 2005: gate oxide thickness: 10 nm

2

1 ox

ox

oxox

ox

oxox d

d

dV

C

QV

-The electron tunneling distance in SiO2 is 3 nm.

-In thin oxides (dox<20 nm), electron tunneling from both gate/SiO2 and SiO2/Si interfaces eliminates or at least neutralize trapped charge near the interfaces.

-For very thin oxides (dox<6 nm), the two tunneling fronts meets in the center of the oxide layer, leaving no positive oxide trapped charge.

-The problem of hardening gate oxides is basically solved for what concerns positive charge trapping.

202 4 6

1986

81

Ef,m Ef,Si

Ei

EC

EV

++

--

++ ++ ++ ++ ++--

Al SiO2 Si

1) Electrons from Al and Si recombine with the trapped SiO2 positive charge within 3 nm from the SiO2 interfaces.

2) SiO2 positive charge trapping is negligible for oxide thickness lower than 6 nm.

3 nm 3 nm

Device scaling

82

The conduction through SiO2 layers

Thick oxidesOxide thickness Conduction mechanism > 6 nm Fowler-Nordheim tunneling

Ultra-thin oxidesOxide thickness Conduction mechanism< 3 nm Direct tunneling

Thin oxidesOxide thickness Conduction mechanism< 6 nm and > 3 nm Trapped assisted tunneling

83

The conduction through thick (>3 nm) SiO2 layers

Al

SiO2

Si

V<0

MOS capacitor with a negative gate voltage applied, and the corresponding band diagram showing the Fowler-Nordheim conduction mechanism (right).

1) Electrons tunnel from gate to the SiO2 conduction band through the triangular potential barrier and move in the SiO2 conduction band to the Si substrate.2) The conduction mechanism through a triangular potential barrier is called Fowler-Nordheim (FN) tunnelling.

Ef,m

Ef,Si

Ei

EC

EV

--

Al SiO2 Si

++

3 nm

VAl<0 VSi=0

C

84

J A F eC

C

B

F

| || |2 A=

q mh mC ox

2

8 A=q mh mC ox

2

8 q mh mC ox

2

8 B=

4

3

8 2

2

3 2 m

h

q

qox C( ) /

B=4

3

8 2

2

3 2 m

h

q

qox C( ) /

4

3

8 2

2

3 2 m

h

q

qox C( ) /

|V g | (Vo lt)

|Ig| (

Am

pere

)

1 0 -1 2

1 0 -9

1 0 -6

1 0 -3

0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 6 0

Fowler-Nordheim conduction through a 200 nm thick SiO2 layer.

Eox=120 V/200 nm=6 MV/cm

FNregion

Oxidebreakdown

The conduction through thick (>3 nm) SiO2 layers

85

The conduction through ultra-thin (<3 nm) SiO2 layers

Al

SiO2

Si

V<0

MOS capacitor with a negative gate voltage applied, and the corresponding band diagram showing the direct tunneling conduction mechanism (right).

-The direct tunnel effect is relevant for ultra-thin (<3 nm) SiO2 layers: electrons tunnel from gate to the SiO2 conduction band through the trapezoidal potential barrier directly to the Si substrate.

Ef,mEf,Si

Ei

EC

EV

--

Al SiO2 Si

++

<3 nmVAl<0 VSi=0

Is there any implication for technology and radiation hardness?

86


The decrease in gate oxide thickness (<3 nm) for CMOS technology nodes under100 nm has resulted in negligible radiation-induced charge trapping, but it also result in increased gate-substrate tunneling current:

-increase in MOSFET off-state current and power dissipation;

-new materials with dielectric constant (K) higher than SiO2, so that, for a given gate capacitance value, the thickness of the dielectric film can be increased, limiting the direct tunneling current: Hf-O/SiO2/Si, Al2O3/SiOXNY/Si: which is the radiation hardness of these high-K dielectric materials?

Nowadays research issues

oxSiOox t

AC

20dielectric

dielectricdielectric t

AC 0

87

The conduction through thin (3 nm<TSiO2<6 nm) SiO2 layers

Ef,mEf,Si

Ei

EC

EV

--

Al SiO2 Si

++

6 nmVAl<0 VSi=0

Oxide trapAl

SiO2

Si

V<0

1) The trap assisted tunneling (TAT) is the tunnel effect by a defect in the SiO2 layers. 2) TAT is active at lower voltages than the Fowler-Nordheim (FN) conduction because TAT is through a trapezoidal potential barrier, while FN is through a triangular potential barrier.3) The electron tunneling distance is 3 nm: TAT cannot be observed for oxide thickness than 6 nm.

MOS capacitor with a negative gate voltage applied, and the corresponding band diagram showing the trapped assisted tunneling (TAT) conduction mechanism (right).

88

Radiation effects: gate oxides in deep submicron CMOS technologies

Gate current versus voltage (Ig-Vg) measured before and after irradiation of 3 nm oxide. The curves referring to RILC have been measured after 51010 Si ions/cm2 (E=158 MeV, LET=8.5 MeVcm2/mg). The curve referring to RSB has been measured after 107 I ions/cm2 (E=277 MeV, LET=61.8 MeVcm2/mg).

-The scaling down of contemporary CMOS technologies decreases the gate oxide thickness and the threshold voltage variation after irradiation ........ but also new reliability issues for radiation hardness appears due to defect generationin the SiO2 layer:Radiation Induced Leakage Current (RILC);Radiation Soft Breakdown (RSB);Radiation Hard Breakdown (RHB).

2004

89

Radiation Induce Leakage Current (RILC)The radiation induced leakage current (RILC) is an increase of the current through the SiO2 layer due to an inelastic trap assisted tunneling by neutral defects generated by ionizing radiation (-rays, electrons, protons, ions). The traps are distributed all over the oxide area.

1999

90

Radiation soft breakdown (RSB)

1) The radiation soft breakdown (RSB) is a huge increase of the current through the SiO2 layer due to multi-trap assisted tunneling through a localized path of neutral defects generated by ionizing radiation (mainly ions).2) A single high LET ion strike is able to generate RSB along its high ionizing track.

RILC and RSB in 4 nm oxides

RSB

RHB

RILC

91

RILC and RSB

Oxide conduction Oxide conductionand RSB

Oxide conductionand RILC

2001

92

Mobility degradation

Defects in SiO2 close to the SiO2/Si interface can also reduce the carrier mobility in the channel by acting as scattering centers.

93

5F. Radiation effects due to positive charge trapping in field oxides

94

Radiation induced field oxide leakage current in n-MOSFET-Technology scaling down: decrease of the gate oxide thickness, but the field oxide of advanced commercial technologies for are still relative thick and are soft to ionizing radiation. A relatively small dose in field oxides (10 krad) can induce sufficient positive charge trapping to cause field oxide induced IC failure.

-Field oxide thickness: 100 nm – 1000 nm.-Field oxide are not produced only by thermal oxidation, but also by deposition techniques: the trapping properties of field oxide may be poorly controlled.

-Field oxide isolation is performed bya) Local oxidation of Silicon (LOCOS)b) Shallow Trench Isolation (STI) in advance sub-micron technologies

CMP=Chemical Mechanical Polishing

95

Radiation induced field oxide leakage current in n-MOSFET1) In n-MOSFETs with LOCOS isolation, the positive charge build-up in the birds’ beak regions can invert the underlying p-type surface forming an n-type region underneath the filed oxide, i.e. a conductive path can be generated from source to drain, which will greatly increase the leakage current even at VGS=0V.

-Similar conductive path are generated for n-MOSFETs with STI isolation:a) a leakage path occurs at the edge of the gate oxide transistor between the source and the drain;b) a leakage path occurs between the n-type source and drain regions of a n-MOSFET and the n-well of adjacent p-MOSFET.

1)

a)

b)

1998

96

Radiation induced field oxide leakage current in n-MOSFET [op]

Ionizing radiation in the field oxide isolation structures, i.e. in the Local Oxidation of Silicon (LOCOS), causes positive charge build-up in the bird’s beak region and in n-MOSFET it turns on a parasitic lateral leakage paths from source to drain, even if there is no channel formed under the gate.

1987

Top view

Lateral view

LOCOS

97

Radiation induced field oxide leakage current in n-MOSFET

Contributions to the source-drain current in n-MOSFET with LOCOS isolation before and after irradiation from:-the channel under the gate oxide for the gate oxide transistor;-the parasitic lateral channel under the LOCOS bird’s beak region for the parasitic field oxide transistor.

The field oxide form a parasitic field oxide transistor in parallel with the gate oxide transistor: the parasitic field oxide transistor consists of the gate polysilicon, a portion of the filed oxide and the source and drain of the gate transistor

Parasitic field oxide transistor: large thickness of the field oxide => high VT>0 before irradiation and high VT<0 due to positive charge trapping after irradiation.

LOCOS

98


ID(VG=0)

ID(VG=0)

300 k

100 k

70 k

500 k

400 k

300 k

VT is not a problem but …

PA

= A

nnealing: 1 w

eek a 100ºC

PA

= A

nnealing: 1 w

eek a 100ºC

After annealing . . .,consequently is it a problem for Space?

99


Technology node: 130 nm (year: 2005)

New technology node: evaluation of its radiation hardness . . .A continuous running to evaluate radiation hardness of new commercial technologies

100

Enhanced Low Dose Rate Sensitivity (ELDRS) in n-MOSFETs

In MOSFET technology, the degradation induced by ionizing radiation in field oxides (LOCOS), inducing parasitic leakage current paths from source to drain, estimated by Laboratory testing (high dose rates) even after the 100ºC annealing for 1 week, underestimates the degradation induced by the Space environments (low dose rates): Enhanced Low Dose Rate Sensitivity (ELDRS).

ELDRS is due positive charge trapping in the oxide which modify the oxide electric field and the subsequent spatial distribution of the trapped holes (Space Charge effects in the oxide) and lowering the annealing rates at low dose rates.

LOCOS

101


The variation of the shallow insulator thickness at the top corner of the trench can results in very high oxide electric fields:-reduction of the gate oxide integrity;-anomalous humps in the sub-threshold Ids-Vgs characteristic;-limiting the radiation hardness: as the electric field increases, the VT<0 amplitude for the parasitic field oxide transistor increases;-worst case condition "ON": VGS>0, VDS=VBS=0

Vfb (red) and contributions from the positive trapped oxide charge (Vox) and from the interface states (Vit) inn-MOSFET, whose gate oxide has been deposited, as for the field oxide in STI, as a function of the electric field inside the oxide. The electric field in the field oxide must be kept lower than 1 MV/cm.

STI

102

Parasitic leakage current path in a n-channel MOSFET transistor with LOCOS design for the gate-field oxide structure due to charge trapping in the oxide (left)

and effect on the sub-threshold characteristics (right).


LOCOS

How to solve this problem?How to eliminate the parasitic leakage paths

from source to drain?

103

n-MOSFET leakage current path mitigation by enclosed layout

Standard layout: leakage current path between source and drain

Enclosed layout: no leakage current path between source and drain

Solution: change the transistor topology from “Standard" to “Enclosed".

104


Enclosed layout transistor

Is it working?

105



Disadvantages:1) area increases by a factor 3.2 for the minimum geometry transistor;2) avoid sharp corners where the electric field can become large, resulting in undesiderable

reliability consequences;3) which is the effective channel length? The electric field for carriers traversing the device

near the corners is variable.4) Difficulties in modelling: requires the development of a custom cell library.3) Increased gate and source/drain capacitance.4) Are not symmetric devices: asymmetry in the output characteristics: dIds/Vds for a fixed Vgs

is higher for the drain inside configuration. Chosing the inner ring as drain minimize the drain area and the drain to substrate capacitance.

106



Real layout (0.25 m node)

Effective channel lenght

=0.05K=3.5 se L 0.5 mK=4 se L>0.5 m

·L

c

d

d’

Leff: gate length shortening due to under-diffusion, lithography and etching

107

Loss of interdevice isolation

How to solve this problem?

Radiation induced hole trapping in thick isolation oxides can drivethe channel of parasitic n-type field oxide transistor into inversion (ON) resulting in

leakage between adjacent devices and a lack of isolation (n-well and n-MOSFET source)

n-MOSFETn-well

Signal corruptionAdditional supply current

Increase in rail voltage drop

108


Radiation induced hole trapping in thick isolation oxides can drivethe channel of parasitic n-type field oxide transistor into inversion (ON) resulting in

leakage between adjacent devices and a lack of isolation (n-well and n-MOSFET source)

Cross-section of a CMOS process with a p+-channel stop implant designed into the isolation field oxide to mitigate the loss of interdevice isolation due to ionizing radiation.

The p+-channel stop implant must surround each transistor: area penalty. It can be implemented in CMOS technology but the layout rules of the technology must be respected.

n-MOSFETn-well

109


Development of ad-hoc test structures (transistor with a polysilicon gate over the field oxide for isolation between the n-well and the source of the n-MOSFET)

Polysilicon gate

PA

= A

nnealing: 1 w

eek a 100ºC

After annealing . . .,consequently is it a problem for Space?

110

5G. Radiation effects inSilicon on Insulator (SOI) Technology

111

SOI Technology

CMOS Silicon on Insulator Technology (SOI)

CMOS Standard bulk technology

-SOI transistor are built on top of an oxide instead of a silicon substrate.-SOI process technology is similar to standard bulk technology.

20-250 nm350-400 nm

112

SOI Technology

Standard top gate transistor

Parasitic back-gate transistor

How to measurethe Vds-Ids characteristic

of the back gate transistor

113

SOI Technology"Partially depleted" SOI technology: the depletion region under the top gate transistor does not extend completely through the p+ body region, there is a non-depleted region between the top gate and the back gate, the top gate transistor and the back gate transistor are not directly coupled, the p+ body region is floating, the top gate transistor characteristics are not directly affected by charge buildup in the buried oxide. Silicon thickness: 100-250 nm

"Fully depleted" SOI technology: the depletion region under the top gate transistor extend completely through the p+ body region, there is a fully depleted region between the top gate and the back gate, the top gate transistor and the back gate transistor are directly coupled, the top gate transistor characteristics are directly affected by charge buildup in the buried oxide. Silicon thickness: 20-50 nm

Floating body region

114

"Partially depleted" SOI technology: the depletion region under the top gate transistor does not extend completely through the p+ body region, there is a non-depleted region between the top gate and the back gate, the top gate transistor and the back gate transistor are not directly coupled, the p+ body region is floating, the top gate transistor characteristics are not directly affected by charge buildup in the buried oxide. Silicon thickness: 100-250 nm

"Fully depleted" SOI technology: the depletion region under the top gate transistor extend completely through the p+ body region, there is a fully depleted region between the top gate and the back gate, the top gate transistor and the back gate transistor are directly coupled, the top gate transistor characteristics are directly affected by charge buildup in the buried oxide. Silicon thickness: 20-50 nm

SOI Technology

115

SOI Technology

In SOI technologies the parts sensitive to the dose deposited by ionizing radiation are:1) the gate oxide of the front-transistor (analogous to the bulk CMOS technology, and

already considered);2) the field oxide of the Shallow Trench Isolation (analogous to the bulk CMOS

technology, and already considered);3) the buried oxide of the parasitic back-transistor.

The positive charge trapped in the buried oxide of the parasitic back-transistor inn-MOSFET can:-invert the surface of the body region from p-type to n-type causing a parasitic leakage path from the source to the drain of the top gate transistor;-high VT<0 of the parasitic back-transistor (VT becomes negative) which is in the on condition also for VBack Gate=0.

1999

116

SOI Technology


Top gate transistor (n-MOSFET)Parasitic back gate transistor

n-MOSFET, Unibond wafer, Co60 -ray irradiation, all terminals grounded during irradiation.

2000

117

SOI TechnologySIMOX

(Separation by Implanted Oxygen)

(a) Deep O ion implantation(b) High temperature annealing (1350 ºC)to form theSiO2 deep layer

(a) Protons are implanted at 5·1016 cm-2 in Wafer A with has a SiO2 surface layer.

(Unibond) Smart cut splitting

(b) Wafer A is bonded on Wafer B by using Van der Waals Force.

(c) The top Wafer is removed by thermal activation at 500ºC by forming a cleavage plane.Then High thermal annealing and polishing.

High temperature processes cause O diffusion from the buried oxide, leaving oxide defects, which can cause positive charge trapping due to ionizing radiation exposure.

118

SOI Technology

Technology node: 0.5 mOxide thickness for the front gate transistor: tox=12.5 nm

Shallow Trench Isolation

2000

SIMOX waferBuried oxide thickness: 370 nm

Partially depletedTop silicon thickness: 170 nm

Unibond waferBuried oxide thickness: 400 nm

Partially depletedTop silicon thickness: 185 nm

119

SOI Technology

Which is the best SOI substrate for radiation hardening?(Minimum threshold voltage variation of the parasitic back gate transistor)

"0 V":All terminal groundedVS=VD=VG=VBody= 0V

"OFF" (Front gate n-MOSFET)VD=VDD

All other terminals groundedVS=VG=VBody= 0V

Unibond=Smart cut technology by SOITEC

2000

Answer . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .

n-MOSFET

0 V

120

SOI Technology

Which is the worst case irradiation condition?(Maximum threshold voltage variation of the parasitic back gate transistor)

The electric field lines are perpendicular to the equi-potential line: the electric fieldis from points at high potential (red) to points at low potentials (blue)

Gate Source Drain Body Substrate

Which is the picture For the "ON" condition?

121

SOI Technology

Which is the worst case irradiation condition?(Maximum threshold voltage variation of the parasitic back gate transistor)

"TG" (Transmission bias condition):VS=VD=VDD

VG=VBoby=0V

Answer . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .

"ON" (Front gate n-MOSFET)VG=VDD

All other terminals groundedVS=VD=VBody= 0V

"OFF" (Front gate n-MOSFET)VD=VDD

All other terminals groundedVS=VG=VBody= 0V

n-MOSFET, Unibond wafer, Co60 -ray irradiation, all terminals grounded during irradiation.

122

SOI Technology

The positive charge trapped in the buried oxide of the parasitic back-transistor infully depleted n-type MOSFET can cause a decrease in the threshold voltage of the top gate transistor: more sensitive to radiation than “Partially depleted" SOI devices.

"Fully depleted" SOI technology: the depletion region under the top gate transistor extend completely through the p+ body region, there is a fully depleted region between the top gate and the back gate, the top gate transistor and the back gate transistor are directly coupled, the top gate transistor characteristics are directly affected by charge buildup in the buried oxide.

In advanced "Fully depleted" SOI devices with gate length in the range of several tens of nanometers a radiation-induced high current regime from source to drain can exist in floating body devices, both at low and high drain voltages.This high current regime is attributed to a floating body effects and is sometimes refereed to as "Total dose latch" or "Total dose snap back effect".An external body contact in the device prevents the onset of this high leakage current regime from source to drain.

123

SOI Technology

p+ body

source N+

drain N+

source N+

drain N+

p+ bodyp+ body

124

SOI Technology

Improving the radiation hardness of the buried oxide by technology by Silicon ion implantation.-The Silicon ion implantation creates in the buried oxide electron traps, which can be filled during irradiation by ionizing radiation, so compensating the positive trapped charge.

Improving the radiation hardness by new device layout.-In the BUSFET (Body-Under-Source-Field-Effect-Transistor), the source penetrates only partially through the top silicon layer, and is isolated from the buried oxide by the body silicon region which is also contacted by the p+ body contact. The inverted n-type layer at the buried oxide surface can not create a parasitic leakage path from source to drain.

SOI n-MOSFET without body contact SOI n-BUSFET with body contact

125

Radiation-hard vs Commercial Technologies

Commercial vs Radiation-Hard technologies(MIPS=Million of Instructions Per Second)

126

Test

127

1) Descrivi gli effetti della radiazione ionizzante (carica positiva intrappolata nell’ossido e generazione di stati interfacciali) sulla caratteristica Ids-Vgs di un transistor MOSFET a canale p e di un transistor MOSFET a canale n.

2) Dopo aver descritto l’effetto dell’annealing sulla carica positiva intrappolata nell’ossido e sulla generazione di stati interfacciali per un MOSFET a canale n e per un MOSFET a canale p, descrivi cosa si intende per effetto "Rebound" in un MOSFET a canale n.

3) Descrivi dal punto di vista microscopico il modello per l’intrappolamento e l’annealing della carica positiva nel SiO2 tenendo presente l’importanza della vacanza dell’ossigeno e del centro E'. Descrivi dal punto di vista microscopico il modello per la generazione degli stati interfacciali a partire dal centro Pb0 passivato dall’idrogeno.

4) Descrivi sinteticamente l’effetto ELDRS (Enhanced Low Dose Rate Sensitivity) nei BJT

5) Perchè con lo scaling down delle tecnologie, l’ossido di gate dei MOSFET diventa intrinsecamente meno sensibile agli effetti da dose totale della radiazione ionizzante?

Test: domande 1-5

128

6) Quali sono le differenze tra la conduzione di Fowler-Nordheim, per tunneling assistito da trappole e per tunneling diretto attraverso l’isolante SiO2, e per quali spessori di ossido tali tipi di conduzione sono rilevanti?

7) Che cosa si intende per RILC, RSB, RHB?

8) Descrivi gli effetti del danno da dose totale indotti dalla radiazione ionizzante negli ossidi di isolamento LOCOS dei MOSFET a canale n e le conseguenze sulle caratteristiche Igs-Vds. Quali sono le tecniche di layout per prevenire tali effetti?

9) Descrivi gli effetti del danno da dose totale indotti dalla radiazione ionizzante negli ossidi di isolamento tra dispositivi MOSFET. Quali sono le tecniche di layout per prevenire tali effetti?

10) Dopo aver descritto le principali caratteristiche della tecnologia CMOS SOI, evidenziando le differenze rispetto alla tecnologia CMOS Bulk, indica gli effetti da dose totale indotti dalla radiazione ionizzante con particolare riguardo all’attivazione del transistor parassita sul backside e alle tecniche di layout per prevenire l’attivazione di tale transistor parassita.

Test: domande 6-10

129

Note

-Il materiale, la cui raccolta e organizzazione ha richiesto un notevole impegno, può essere utilizzato liberamente per fini di studio e ricerca, se possibile citandone la fonte e le referenze.

-Ringrazio tutti coloro che mi segnaleranno parti da correggere/migliorare.

130

Riassunto

131

Ionizing radiation in SiO2: p-MOSFET threshold voltage

VT<0: channel of holes

132

Ionizing radiation in SiO2: n-MOSFET threshold voltage

VT>0: channel of electrons

Ionizing radiation in SiO2 and defect generation mechanisms

14 orders of magnitude for time:1 day: 8.6·104 s1 week: 6.05 · 105 s1 month: 2.6 ·106 s1 year: 3.15·107 s

134

Initial hole yield: geminate and columnar recombination modelsGeminate recombination model (can be applied for electron and Co60 irradiation):a) The average separation distance between electron-hole pairs is higher than the thermalization distance.b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.c) Electrons and holes drifts in opposite direction due to the electric field.d) Electrons and holes moves randomly due to thermal fluctuations of the system.c) The interactions with other electron-hole pairs can be neglected.

Columnar recombination model (can be applied for heavy ions (Z>1)):a) The average separation distance between electron-hole pairs is lower than the thermalization distance: there are several electrons closer to any given hole than the electron, which was its original partner.b) The recombination probability is higher for the columnar model than for geminate model.

135

Geminate recombination model (can be applied for electron and Co60 irradiation):a) The average separation distance between electron-hole pairs is higher than the termalization distance.b) The interaction between electron and hole of an isolated pairs is due to Coulomb attraction.c) Electrons and holes drifts in opposite direction due to the electric field.d) Electrons and holes moves randomly due to thermal fluctuations of the system.c) The interactions with other electron-hole pairs can be neglected.

Initial hole yield: geminate recombination model


nmcm

MVdEV 1001

Vcmcm

V1010

101 5

6

136

Columnar recombination model (can be applied for heavy ions (Z>1)):a) The average separation distance between electron-hole pairs is lower than the termalization distance: there are several electrons closer to any given hole than the electron, which was its original partner.b) The recombination probability is higher for the columnar model than for geminate model.

Initial hole yield: columnar recombination model


nmcm

MVdEV 1001

Vcmcm

V1010

101 5

6

2 MeV particle B is the radius at half-maximum for the Gaussian charge distribution of the 2 MeV particle: i.e. 1.178·.

137

Initial hole yield for different radiations

The fractional yield for holes as a function of the proton energy:

-at low proton energy: columnar model-at high proton energy: geminate model

Linear Energy Transfer for different radiations(values for 10 keV X-rays and Co60 -rays are for primary electrons) [2002]:

- geminate model applied at low dE/dx;

- columnar model applied at high dE/dx;

-10 keV X-rays simulates 20-60 MeV protons;

- Co60 -rays simulates 1 MeV electrons;

138

The positive charge oxygen vacancy

-The bonding between the two Si atoms of the Vo defect can be broken by

exciting a bonding electron to the SiO2 conduction band or by hole trapping.

-The new defect, is called positive charged oxygen vacancy (Vo+). It is

represented by the chemical formula: O3Si°SiO3, where the symbols "" and "°" are the unpaired electron and the trapped hole, respectively.-The Vo+ center is positive charged (°SiO3) and paramagnetic (O3Si). It can be characterized by the electron-spin-resonance (ESR) technique. The paramagnetic part of the Vo

+ defect is called E' center.

The positive charged oxygen vacancy defect. The arrow indicates the unpaired electron of the neutral Si atom. The Vo

+ defect is strongly correlated to the positive charge induced by ionising radiation.

139

Defect classification in SiO2

G a te

b u lk co n ta c t

to x

The MOS capacitor. The classification of the defects in the SiO2/Si system,depending on their location (a) and electrical behaviour (b).

-Location: oxide traps, border traps and interface traps-Electrical behavior: fixed states (positive and negative charge or neutral) switching states (can exchange charge by tunneling)

140

qB



Interface states

-The Pb center is a trivalent Si defect at the SiO2/Si interface: i.e., a silicon atom bonded to three other Si atoms with an unpaired electron in an orbital pointing out to a vacancy. It is represented by the chemical formula Si3Si.-The Pb defect is amphoteric, that is its charge condition can be positive, negative or neutral.


141

Ionizing radiation in SiO2: summary

(a) Before irradiation.(b) During irradiation: electrons and holes are generated by ionizing radiation.(c) Electrons are sweep out in picoseconds, under Vg>0 holes slowly moves to the SiO2/Si interface.(d) Holes are trapped in SiO2 close to the SiO2/Si interface. Interface states are created at the SiO2/Si interface.

Effects of the positive oxide trapped charge and of the charge trapped in the interface states on the threshold characteristics ofp-MOSFET and n-MOSFET.

142

Device scaling

143


Al

SiO2

Si

V<0

MOS capacitor with a negative gate voltage applied, and the corresponding band diagram showing the direct tunneling conduction mechanism (right).

-The direct tunnel effect is relevant for ultra-thin (<3 nm) SiO2 layers: electrons tunnel from gate to the SiO2 conduction band through the trapezoidal potential barrier directly to the Si substrate.

Ef,mEf,Si

Ei

EC

EV

--

Al SiO2 Si

++

<3 nmVAl<0 VSi=0

Is there any implication for technology and radiation hardness?

144

The conduction through thin (3 nm<TSiO2<6 nm) SiO2 layers

Ef,mEf,Si

Ei

EC

EV

--

Al SiO2 Si

++

6 nmVAl<0 VSi=0

Oxide trapAl

SiO2

Si

V<0

1) The trap assisted tunneling (TAT) is the tunnel effect by a defect in the SiO2 layers. 2) TAT is active at lower voltages than the Fowler-Nordheim (FN) conduction because TAT is through a trapezoidal potential barrier, while FN is through a triangular potential barrier.3) The electron tunneling distance is 3 nm: TAT cannot be observed for oxide thickness than 6 nm.

MOS capacitor with a negative gate voltage applied, and the corresponding band diagram showing the trapped assisted tunneling (TAT) conduction mechanism (right).

145


Contributions to the source-drain current in n-MOSFET with LOCOS isolation before and after irradiation from:-the channel under the gate oxide for the gate oxide transistor;-the parasitic lateral channel under the LOCOS bird’s beak region for the parasitic field oxide transistor.

The field oxide form a parasitic field oxide transistor in parallel with the gate oxide transistor: the parasitic field oxide transistor consists of the gate polysilicon, a portion of the filed oxide and the source and drain of the gate transistor

Parasitic field oxide transistor: large thickness of the field oxide => high VT>0 before irradiation and high VT<0 due to positive charge trapping after irradiation.

LOCOS

146



Is it working?

147

SOI Technology

CMOS Silicon on Insulator Technology (SOI)

CMOS Standard bulk technology

-SOI transistor are built on top of an oxide instead of a silicon substrate.-SOI process technology is similar to standard bulk technology.

20-250 nm350-400 nm

148

SOI Technology

Standard top gate transistor

Parasitic back-gate transistor

How to measurethe Vds-Ids characteristic

of the back gate transistor

149

SOI Technology

In SOI technologies the parts sensitive to the dose deposited by ionizing radiation are:1) the gate oxide of the front-transistor (analogous to the bulk CMOS technology, and

already considered);2) the field oxide of the Shallow Trench Isolation (analogous to the bulk CMOS

technology, and already considered);3) the buried oxide of the parasitic back-transistor.


1999

150

SOI Technology

Improving the radiation hardness of the buried oxide by technology by Silicon ion implantation.-The Silicon ion implantation creates in the buried oxide electron traps, which can be filled during irradiation by ionizing radiation, so compensating the positive trapped charge.

Improving the radiation hardness by new device layout.-In the BUSFET (Body-Under-Source-Field-Effect-Transistor), the source penetrates only partially through the top silicon layer, and is isolated from the buried oxide by the body silicon region which is also contacted by the p+ body contact. The inverted n-type layer at the buried oxide surface can not create a parasitic leakage path from source to drain.

SOI n-MOSFET without body contact SOI n-BUSFET with body contact

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