SVT upgrade

• SVT upgrade:

a)E’ parte dei DAQ upgrades per

aumentare “Trigger bandwidths”

b)Tracce SVX only per migliorare il

trigger di leptone inclusivo

• DAQ upgrades a CDF: 6 M$

• Chi saremo – Schedule

AM 32kpat 128kpatRoad Warrior

Paola Giannetti – Gruppo I Lecce - 24 settembre 2003

SVT: Silicon Vertex TriggerXFT + SVX 4/4 (fino a

6/2003)

XFT + SVX 4/5, more efficient

Instead of XFT: 1<<1.5

e 1<<2.5

New Functionalities: + SVX 4/5, 11.5e + SVX 4/5,

12.5

XFT tracksSVX hits

L2 Accept rate (Hz)

L3 Accept rate

15 kHz (L2 proc. Time)

350 Hz (L3-EVB)

70-80 Hz (L3-CSL)

I limiti ai rate dei tre livelli di trigger

L1 Accept rate (Hz)

Dead Time5%

Time (sec)

Time (sec)

TDC (2132 k$)EVB (680 k$)L3 (631 k$)upgrade

CSL (?k$)

Offline (1M$)

upgrade

XFT (2227 k$)L2 (429 k$)SRC (Done)SVT (? K$)upgrade

Accurate deadtime model (ModSim) to understand DAQ upgrades

Dead

Tim

e

L1A rate (kHz)

M. Schmidt

4/4

4/4 – 4/5 4/4 – 4/5

20 kHz

25 kHz

35 kHz5%

1. Two SRCs in parallel

2. L2 processor upgrade

3. 87 bit SVX digit.

4. -3 s in SVT proc.time

5. cut SVT tails above 27 sec

BUT the recent use of 4/5 in SVT changes the conditions!

1. match piu’ debole 2. Ghost roads3. 5 layers: Pattern +

larghi

27 sec

Time (s)

WHY 4/5? Signal Yields with 4/5

4/4

4/5

Marco Rescigno CSL review 6/23/03

1430

970

J/psi

D0

D0

Signal Yields in 4/5

Several studies:• D0 peaks in RUN 164303 (4/4) and

164304 (4/5) (Rolf)• EXPRESS_JPSI stream for 4/5

runs with svtsim emulation of 4/4 to get directly the yield increase of J/psi with both legs an SVT track

• BGEN MC with realistic simulation of BsDs

• Increase in signal yield match almost exactly the increase in L3 yield:

S/B unchanged

source 4/4 4/5 R

D0 yield 11.2 (nb)

17.5 (nb)

1.55 ±0.06

J/psi yield 663 974 1.5

Bs MC(Pt_b>5.5; |_b|<1.3)

1.59 ±0.05

Bs MC after offline reconstruction (Ivan F.)

1.58

Marco Rescigno CSL review 6/23/03

GAIN 50-60 %

Tempi di processamento: come agisce l’upgrade ?

Ricetta per velocizzare il tempo di esecuzione di SVT:

1. pattern piu’ sottili (AM grande) meno fits.

2. Road Warrior per rimuovere i ghosts

Hit Finders

Merger

Associative Memory

Hit Buffer

Track Fitter

to Level 2

COT tracks

fromXTRP

12 fibers

hits

roads

hits

x 12 phi sectors

Sequencerraw data fromSVX front end

NUOVA AM piu’ grande

Road Warrior

Annovi/Belforte

4/5 – upgraded 4/5 – 4/4

4/5 – 128kp – RW – All

XFT

svx

Detector Ghosts

Gli upgrade riportano la distribuzione deitempi del 4/5 su quelladel 4/4 !

4/5

SVT ha recentemente attivato il 4/5.Complessita’ e tempo di esecuzione sono aumentati.

ROAD WARRIOR e AM ++ riportano il tempo di esecuzione a quello del 4/4 !

L1_TWO_TRK_PT2

B physicsL1_TWO_TRK2_&_TWO_CJET5 Zbb

SVTconfiguration # of fits # of fits

32 kpatt 4/4 3.9 9.4

32 kpat 4/5 (now) 39.1 94

32 kpat 4/5 + RW 17.6 42

128 kpat 4/5 + RW 9.3 23

Detector ghost 4.3 14.5

0

2

4

6

8

10

12

14

16

18

20

0 10 20 30 40 50

L1A rate (kHz)

To

tal D

ead

Tim

e

RUN 168640

4/4L2UP-L2A 300Hz

4/4L2UP-L2A 300Hz

4/4NOUP-L2A 140 Hz

4/4NOUP-L2A 300 Hz

Accurate deadtime model (ModSim)

Ini_lum=32*1030

Ini_lum= 17.5 *1030

Ini_lum=22*1030

3

17kHz

4/5+SVTupgrade 4/4

4/4

4/5 nowIni_lum=44*1030

4/5+SVTupgrade+L2upgrade

16

M. Schmidt

Trigger di muoni in avanti (Annovi - Catastini – Cerri)

1<<1.25 (FRONT) L1 ora:

BMU*BSU(F)*XFT11

rate 8-16Hz @ 4E31

L2: RateLimited @ 0.7 Hz

1.25<<1.5 (REAR) L1 ora:

BMU*BSU(R)*TSU

Rate 200-400Hz @ 4E31

L2: RateLimited @ 1.3 Hz

TSU

BMU

1.25<<1.5 BSU(R)

1<<1.25 BSU(F)

Usiamo SVT*BMU*BSU per un unico trigger, senza bias in ! Goal reiezione ~ 20-50.•leptoni pronti di alto Pt solo 30kpatterns 95% efficiente per Pt>8 GeV e d0<500m (ottima efficienza fino a 4 GeV). Implementiamo il 4/5.

SVX

STUDIO del NUOVO TRIGGER

Selection # eventi

Z0

# eventi

L1_BMU_REAR

L1_MU 250 4678

match <2.5º

Pt>4 & 2<10

132 362

+ match 126 213

Efficiency L2 sel. 0.50Rejection L2 sel. 22

• Qualita’ delle tracce SVX only: studio su dati e MC

• Efficienza selezione L2: studio tagli su dati Z0

• Regezione del fondo: studio su dati selezionati da L1 ora

SVT: 2<10; |MC0 – SVT0|< 0.015

Pt/Pt2=0.095

=0.008

QUALITA’ delle tracce SVX only? Limit: = 0.002, Pt/Pt2 = 0.07

L1_MU data: offline vs SVT

SVT 2<10; |offl0 – SVT0|<0.015

60% 60%60%

effic. effic. Pt effic,

match match Pt match

J/Psi: MC vs SVT

=0.007 Pt/Pt2=0.08M

C-

SV

T

MC

Pt-

SV

TP

t

MC

CR

V-S

VTC

RV

c(SVT)- c(offl)

(SVT)- (offl)

Scegliamo il trigger di livello 2: quali tagli?

Z0-> data : Pt>4 & 2<10

Pt>4 & 2<10+|BMU–0 SVT|< 5O

0 offl vs BMU 0 SVT vs BMU

5o

BMU–0 offl

BMU–0 SVT

CUT

Z0 eff ~ 50% BMU–0 offl (best) BMU–0 SVT (best)

L1 MU dataPer stimare la reiezione

matchingcut

0 offl vs BMU 0 SVT vs BMUBMU–0 offl (best) BMU–0 SVT (best)

Reiezione fondo ~ 22

Conclusioni

• L’upgrade di SVT permettera’ un raddoppio della banda passante di L1 ed e’ parte fondamentale del DAQ upgrade.

• L’uso di tracce SVX only permette un trigger inclusivo di muoni in avanti e di abbassare le soglie di trigger per gli elettroni nel plug.

Pisa:Annovi dottorando (100%)Bardi ingegnere - art. 23 (100%)Dell’Orso prof. Associato (100%)Giannetti dirigente di ricerca (100%)Spinella assegnista INFN (50%)Ferrara:Damiani assegnista (10%)Sartori assegnista (50%)Tripiccione prof. Ordinario (10%)Cotta tecnologo (10%)Chiozzi tecnico (20%)

“A Standard Cell based Content-Addressable Memory System for Pattern Recognition” A. Cisternino et al., CERN/LHCC/98-36

TEMPI DI REALIZZAZIONE• Nuova AM-board: inizio estate 2004 (Pisa) durante estate 2004: test con FPGA (Pisa)• Progetto prototipo AM-chip: luglio 2004 (Ferrara-Pisa)

consegna chip ~2 mesi – disponibile ad ottobre.• Nuova LAMB: montare nuovo AM-chip a ottobre 2004 (Pisa)• test del chip + scheda: ottobre – dicembre 2004 (Pisa-Ferrara)• produzione: inizio 2005 (Pisa-Ferrara)• installazione: estate 2005 (Pisa-Ferrara)• Altri DAQ/Trigger upgrade: previsti nel 2006

RUN Multiprojects di Europractice: nel 2003 tuttii mesi eccetto luglio e Dicembrehttp://www.europractice.imec.be/europractice/

Road Warrior: fattibilita’ in Pulsar S. Belforte (~60 k$ Fermilab)messa in opera entro fine 2003 F. Spinella

SVTBackup slides

backup

slides

• ……………….• L1 accept rate of 30kHz appears to be achievable

– Two SRCs, 7-bit digitization– SVT improvements– L2 upgrade

• L2 peak rate limited by Event-builder– Current limit ~350 Hz– EVB group: 450 is possible- TDC improvements coming

• Will keep up at high luminosity

• Level 3 Limitations

– Input: CPU power …..

– Output: Logging Rate……

J. LewisCDF CSL Review23 June 2003

Il tempo morto (< 5%) genera limiti alla banda passante dei 3 livelli

Level 1 @Lum=40x1030 cm-2 sec-1

• Two Major Components– Calorimeter Triggers: Jets, electrons, photons, etc. ~4-5 kHz

In SVT: L1_JET10_&_ET90 (Higgs multijet)

L1_TWO_TRK2_&_TWO_CJET5 (Zbb)

L1_MET15_&_TWO_TRK2 (Higgs Z ~2 kHz L1_TWO_TRK10_DPHI20 (Di TAU exotic)

L1_EM8 (Gamma + bjet)L1_CEM4_PT4 (B electron)L1_CMUP6_PT4 (B muon)

– Hadronic B Decays: Two XFT tracks ~11-12 kHz • Using three classes of B triggers

– Scenario A• pT>2, pT,1+pT,2>5.5, opp. charge, <135DPS for safety only

– Scenario C• pT>2.5, pT,1+pT,2>6.5, opp. charge, <135DPS

– Low PT• pT>2, <90Heavy DPS, saturate bandwidth• Not considered for long-term

J. LewisCDF CSL Review23 June 2003

Level 1 Predictions

05

101520253035404550

0 10 20 30 40 50 60 70 80 90 100

Luminosity (e30)

Rat

e (k

Hz)

With baseline cuts, saturate bandwidth at ~7e31 if 30 kHz allowed @L1

0

50

100

150

200

250

300

350

400

450

500

0 10 20 30 40 50 60 70 80 90 100

Luminosity (e30)

Rat

e (H

z)

High-pt + Sc. C

High-pt + Sc. A

Level 2 Predictions

CSL Bandwidth: Aggressive

Trigger ModelTo stay below 21Mb/s

Some physics losses

0

2

4

6

8

10

12

14

16

18

20

0 10 20 30 40 50 60 70 80 90 100

Luminosity (e30)

Dat

a V

olum

e (M

b/s)

High-pt + Sc. C

High-pt + Sc. A

TDC (2132 k$)EVB (680 k$)L3 (631 k$)upgrade

CSL (?k$)

Offline (1M$)

upgrade

XFT (2227 k$)L2 (429 k$)SRC (Done)SVT (? K$)upgrade

J. LewisCDF CSL Review23 June 2003

Year chip boards devel. Total

2003? 120 kE10 kE (test b.) 5 kE 135 kE

2004 - 10 kE (protot.) 30 kE 40 kE

2005 53 kE 40 kE (produc.) 60 kE 153 k

Ferrara Pisa

Road Warrior e’ pagato da USA: sottratti i 35 kE corrispondenti nel 2005 (grazie

Stefano!)

Level 2 Operation• Approximate Timing Diagram

1 5SiliconSVX R/OISL R/OL00 R/OSVTLoad in a

CF, , track…Process in a

Process and Load

Setup Digitizer-phi

20 25

R/OR/O (16us Read-All)

r-z

SVT Processing

Unpack, Algorithms, TS Handshake

Time Since L1A (sec)30 35 40 4510 15

Ready to load next event

0

2

4

6

8

10

12

14

16

18

20 30 40 50 60 70 80

Inst. Lum. (10**30 sec-1 cm-2)

L1

A r

ate

(k

Hz) L1A rate (2.4)

L1A rate (2.87)

L1A rate (3.9)

L1A rate (4.15)

L1A rate (4.15)B

L1A rate (5.0)

L1A rate (3.5)

0

2

4

6

8

10

12

14

16

18

20 30 40 50 60 70 80

Ist. Lum. (10**30 sec-1 cm-2)

L1

A r

ate

(k

Hz) L1A rate (2.4)

L1A rate (2.87)

L1A rate (3.9)

L1A rate (4.15)

L1A rate (4.15)B

L1A rate (5.0)

L1A rate (3.5)

3D info from SVT

6 electrical barrels

Z

Due categorie di tracce SVT:1. (Dz=0) Tracce che entrano

escono dallo stesso barrel

2. Tracce che attraversano i barrel. Conosciamo il sengo di .

Una traccia SVT corrisponde ad una

traccia offline se Dz=0 oppure se Dz

ha lo stesso segno di .

Camere dei MU (BMU) + scintillatoriesterni (BSU)

T1< Thr.

T2< Thr.

L1 Trigger: (T1< Thr. OR T2< Thr.) AND BSU

BSU

Come migliorare il fattore di reiezione per il trigger di

Migliorabile con semplici accorgimenti aggiuntivi:

1. Uso dell’informazione di hadron timing

2. Riduzione della finestra temporale per gli scintillari BSU e TSU

3. Usare il beam constraint per il track fitter• Migliora la risoluzione in Pt• Riduce il numero delle tracce false

Z0 TRIGGER STUDY

5 GeV

0.8

0.9

0.7

0.9

Higgs bb (mass = 110 GeV)Z0 ha efficienze minori (mass = 90 GeV)

RUN IB MinimumBias events

Why 4/5 is more complex?5/5 4/5

This road share all hits with the 5/5. It’s a ghost.

NOW pattern recognition with 5 SVX layers uses larger patterns w.r.t. 4 SVX layers

More fake roads and more hits inside roads

Solution: More AM thinner patterns reduce fakes

Ghosts are 60-70% of 4/5 roads. Removing them speeds up 4/5 processing time.

These 3 roads share all hits. Two are ghosts.

4/5 4/5 4/5

Sorgenti di inefficienzaper da Z0

Ineff %

Silicon & clustering

15

wedge crossing

10

AM coverage 5

2 cut 5

Pt cut 7

, match 6

Tracking in 2 steps: find Roads, then find Tracks inside Roads

FullResolution Hits

use mostsignificant bits only

RoadRoad

Super Bin

Super Pattern

AM = BINGO PLAYERS

HIT # 1447

PATTERN NPATTERN 1PATTERN 2

PATTERN 3

PATTERN 5

PATTERN 4

• Dedicated device-maximum parallelism:• each pattern has its private hardware to compare with the event. • Roads search during detector readout

The Event...

The Pattern Bank

TRACKING WITH PATTERN MATCHING

The Associative Memory (AM)

Bingo scorecard

SVX only 2 distribution