Transition Radiation DetectorGas Slow Control System

AMS-02

A. Bartolonia, B.Borgiaa, S. Gentilea

G. Amelino Cameliaa, S. Baccarob, C. Bosioa, C. Gargiuloa, G. La Nevec,

A. Paolozzic, P. Rapagnania ,E. Valentea

a- INFN Sezione di Romab- ENEA – CR Casacciac- Dip. Ing. Aerospaziale , Università “La Sapienza” Roma

Gas System Slow Control

120VDC

Box-CBox-S

PDB

USCMJMDCMonitoring

and Control

Computer

CAN-BUS

MA

NIF

OLD

TRD GAS SYSTEM

UGMmodules

28VDC

Ctrl&Mon Signals

1553 SRDL (NASA Avionics)

UGE-crate

DC-DCconverters

UGBCboard

UGMboards

UGBSboard

TRD

Power Supply

HV Safety Signal to U Crate

UGpd-box

Filter

Ctrl

Gas Mixture

UGE crate prototypes

• 11 Boards 6U height (AMS VME type)• 2 slots USCM dedicated• 9 slots for control boards

• All control boards use FPGA to interface the USCM bus and to pilot the device drivers

• 2 boards to control the BOX-S (UGBS)• 13 solenoid valves • 4 press. & temp. sensors

• 2 boards to control the BOX-C (UGBC) • 2 circulation pumps • 4 solenoid valves• 3 flipper valves• 3 press. & temp. sensors• 1 CO2 analyzer (RS232)• 1 MCA (RS232)• 1 monitor tubes

• 1 board for BOX-C monitor tubes power supply(UHVG)

• 4 boards for Manifold control• 4 to control the 164 flipper valves located in the manifolds (UGFV-AC., UGFV-BD)• logics for 82 pressure sensor signals multiplexing will be inserted in the UGFV boards

hot boards

cold boards

UGE CRATE

Backplane board

UG

BS

UG

BC

’

USC

M

USC

M’

UG

BC

UG

FV

-BD

+ M

ux-P

B

UG

FV

-AC

+ M

ux-P

A

UG

BS’

UH

VG

UG

FV

-AC

’ +

Mux

-PA

UG

FV

-BD

’ +

Mux

-PB

Project Status Prototypes developments

- boards electrical schematic ready

- the whole functionalities addressed

- basic control circuits simulated (PSPICE)

- complex functionality components taken from the AMS preferred part list

- simpler components (MOSFET) selected using derating criteria

- firm selected for PCBs design and production (ProSer S.r.l.)

- UGBC board ready (yesterday !!)

- UGBS board PCB developed (expected ready next week)

- UGFV & UGM module PCBs in development (expected ready in August)

- backplane schematics in development (released after 25-7-02)

UGBC interface to BOX-C

Tasks:• switch on/off and regulate speed of circulation pumps • open the valves • test the status of the valves• monitor pressure and temperature sensor • emergency open of safety valves without USCM intervention• manage emergency in case of massive gas leak

Redundancy:• hot & cold (hot & hot will be evaluated against power

budget) • no duplication of control circuits on the same board

UGBC

Front panels

• All boards use the same USCM I/O BUS interface logic:

• LVDS Receiver• LVDS Driver • A54SX32A FPGA (PQFP 208)

• VHDL is used to describe FPGA logic

• The ACTEL development environment is used

• Libero Software• Silicon Sculptor • Silicon Explorer

LVDSREC.

LVDSDRIV.

Data(15:0)

Address(7:0) , RW, ST, AKN, …..

A54SX32A

JTAG

Board I/O

USCM USCM’

UHVG

UGE backplane using Le Croy bus

UHVG’UGBS UGBS’ UGBC UGBC’UGFV

ACUGFVAC’

UGFVBD

UGFVBD’

USCM

USCM’

UHVG

DIO16+ (ADD0+)

DIO16- (ADD0-)

DIO16+ (ADD0+)

DIO16- (ADD0-)

pCLKA

nCLKA

DIO17+ (ADD1+)

DIO17- (ADD1-)

DIO17+ (ADD1+)

DIO17- (ADD1-)

pCLKB

nCLKB

100Ώ 100Ώ

Backplane

UHVG address backplane

UHVG’

USCM

DIO0+ (DATA0+)

DIO0- (DATA0-)

DIO0+ (DATA0+)

DIO0- (DATA0-)

pDataA

nDataA

DIO1+ (DATA1+)

DIO1- (DATA1-)

DIO1+ (DATA1+)

DIO1- (DATA1-)

pDataB

nDataB

100Ώ 100Ώ

Backplane

100Ώ 100Ώ

UHVG data backplane

USCM’

UHVG

UHVG’

USCM

USCM’

UGxx

UST+, DIO2+ (RESET+)

STR+, RESET+

STR-, RESET-

100Ώ 100Ώ

Backplane

UST-, DIO2- (RESET-)

BGO+ (UST+), DIO3+ (RESET+)

BGO- (UST-), DIO3- (RESET-)

UGxx’

UGxx controls backplane

STR+, RESET+

STR-, RESET-

UST+, DIO2+ (RESET+)

UST-, DIO2- (RESET-)

BGO+ (UST+), DIO3+ (RESET+)

BGO- (UST-), DIO3- (RESET-)

USCM

ACK+ 100Ώ 100Ώ

UGxx

ACK+

ACK-

Backplane

ACK+

ACK-

ACK-

BRI+ (ACK+)

BRI- (ACK-)

UGxx controls (ACK) backplane

USCM’

UGxx’

ACK+

ACK-

BRI+ (ACK+)

BRI- (ACK-)

USCM

USCM’

UGxx

DIO+[18:20] (ADD+[2:4])

ADD+(0:1),AddParityBit

ADD-(0:1),AddParityBit

100Ώ 100ΏBackplane

DIO-[18:20] (ADD-[2:4])

DIO+[21:23] (ADD+[5:7])

DIO-[21:23] (ADD-[5:7])

UGxx’

ADD+(0:1), AddParityBit

ADD-(0:1), AddParityBit

UGxx address backplane

DIO+[18:20] (ADD+[2:4])

DIO-[18:20] (ADD-[2:4])

DIO+[21:23] (ADD+[5:7])

DIO-[21:23] (ADD-[5:7])

USCM

DIO+[4:9] (DATA+[4:9]) 100Ώ 100Ώ

UGxx

DATA+(0:4),DataParityBit

DATA-(0:4),DataParityBit

100Ώ 100Ώ

Backplane

DATA+(0:4),DataParityBit

DATA-(0:4),DataParityBit

DIO-[4:9] (DATA-[4:9])

DIO+[10:15] (DATA+[10:15])

DIO-[10:15] (DATA-[10:15])

UGxx data backplane

USCM’

UGxx’

DIO+[4:9] (DATA+[4:9])

DIO-[4:9] (DATA-[4:9])

DIO+[10:15] (DATA+[10:15])

DIO-[10:15] (DATA-[10:15])

UGxx I/O protocol

UST

ACK

ADD(1:0)

DATA(4:0)

DataParityBit

USCM : Put UGxx Address, Command, Parity bits on busUSCM : flags Ugxx setting UST UGxx (ALL) : Latch Data on the busUGxx (ALL) : Decode AddressAdd. UGxx : Flag USCM setting ACKUSCM : Release Bus USCM : Reset USTAdd Ugxx : Reset ACK

AddParityBit

Command Write Cycle

Command

UGxx Address

Command

UGxx Address

Command Read “Back” Cycle

USCM : Put UGxx Address, AddParityUSCM : flags Ugxx setting UST UGxx (ALL) : Latch Add on the busUGxx (ALL) : Decode AddressAdd. UGxx : Put Rx Cmd + Parity on the BusAdd. UGxx : Flag USCM setting ACKUSCM : Latch DataBus USCM : Reset USTAdd Ugxx : Reset ACK

The addressed Ugxx will replay to this readrequest only if all is OK during the previouswrite cycle (parity checking, cmd decoding).no replay means also that command it is notexecuted by the UGxx

Depending on the command 0 to 3 Write or Read cycleCould happen.In case of writes aRead cycle at the end will flagthe USCM that all is OK

UGBC commands

-- Data Function-- 00000 Reserved-- 00001 Write MV100 Enable Register (1W)-- 00010 Read MV100 Enable Register (1R)-- 00011 Write Open Time Register (3W)-- 00100 Read Open Time Register (3R)-- 00101 Write Pump Enable&Speed Register (1W)-- 00110 Read Pump Enable&Speed Register (1R)-- 00111 Write MCA select Register (1W)-- 01000 Read MCA select Register (1R)-- 01001 Read Current Status Register (3R)-- 01010 Read Event Status Register (3R)-- 01011 Open Valve V6a (0)-- 01100 Open Valve V6b (0)-- 01101 Open Valve V18a (0)-- 01110 Open Valve V18b (0)-- 01111 Open Valve V6a and V18a (0)

-- Data Function-- 10000 Open Valve V6b and V18b (0)-- 10001 Open Valve V8a (0)-- 10010 Close Valve V8a (0)-- 10011 Open Valve V8b (0)-- 10100 Close Valve V8b (0)-- 10101 Activate HV Safety Signal (1W)-- 10110 Read P4 value (3R)-- 10111 Read T4 value (3R)-- 11000 Read P5 value (3R)-- 11001 Read T5 value (3R)-- 11010 Read P6 value (3R)-- 11011 Read T6 value (3R)-- 11100 Read CP1 current (3R)-- 11101 Read CP2 current (3R)-- 11110 Write RS232 register (1W)-- 11111 Read RS232 register (1R)

UGBS commands

-- Data Function-- 00000 Reserved-- 00001 Write MV100 Enable Register (3W)-- 00010 Read MV100 Enable Register (3R)-- 00011 Write Open Time Register (3W)-- 00100 Read Open Time Register (3R)-- 00101 Read El. Current Status Register (3R) -- 00110 Read El. Event Status Register (3R)-- 00111 Read Mech. Event Status Register (3R)-- 01000 Read Mech. Event Status Register (3R)-- 01001 Open Valve V1a (0) -- 01010 Open Valve V’1a (0)-- 01011 Open Valve V1b (0)-- 01100 Open Valve V’1b (0)-- 01101 Open Valve V2a (0)-- 01110 Open Valve V2b (0)-- 01111 Open Valve V3a (0)

-- Data Function-- 10000 Open Valve V3b (0)-- 10001 Open Valve V4 (0)-- 10010 Open Valve V’4 (0)-- 10011 Open Valve V5 (0)-- 10100 Open Valve V20a (0)-- 10101 Open Valve V20b (0)-- 10110 Open Valve V20a and V20b (0)-- 10111 Read P1A value (3R)-- 11000 Read T1A value (3R)-- 11001 Read P1B value (3R)-- 11010 Read T1B value (3R)-- 11011 Read P2A value (3R)-- 11100 Read T2A value (3R)-- 11101 Read P2B value (3R)-- 11110 Read T2B register (3R)-- 11111 Reserved

UGFV commands

-- Data Function-- 00000 Reserved-- 00001 Write PS Enable Register (1W)-- 00010 Read PS Enable Register (1R)-- 00011 Open On Module 1 (3W)-- 00100 Close On Module 1 (3W)-- 00101 Open On Module 2 (3W)-- 00110 Close On Module 2 (3W)-- 00111 Open On Module 3 (3W)-- 01000 Close On Module 3 (3W) -- 01001 Open On Module 4 (3W)-- 01010 Close On Module 4 (3W) -- 01011 Open On Module 5 (3W)-- 01100 Close On Module 5 (3W)-- 01101 Open On Module 6 (3W)-- 01110 Close On Module 6 (3W)-- 01111 Open On Module 7 (3W)

-- Data Function-- 10000 Close On Module 7 (3W)-- 10001 Open On Module 8 (3W) -- 10010 Close On Module 8 (3W)-- 10011 Reserved-- 10100 Reserved-- 10101 Reserved-- 10110 Reserved-- 10111 Reserved-- 11000 Reserved-- 11001 Reserved-- 11010 Reserved-- 11011 Reserved-- 11100 Reserved-- 11101 Reserved-- 11110 Reserved-- 11111 Reserved

“Le Croy Bus” protocol for UGE

RECEIVE CYCLE

-- S(1) = 1-- S(2) Parity bit (odd)-- S(3) Power Down Bit -- S(4) Broadcast Bit-- S(5:12) Select Code -- S(13) RD/WR bit-- S(14:16) Section Address-- S(17:32) Data to be written

TRANSMIT CYCLE

-- S(33) = 0-- S(34) echo of S(2)-- S(35) echo of S(3) -- S(36) echo of S(4)-- S(37:44) echo of S(5:12)-- S(45) echo of S(13)-- S(39:41) echo of S(14:16)-- S(42:64) Data to be read

UGBC Section Address

000 MV100, MCA, Pump Register001 Open Time Register010 Curr. or Event Status Reg.011 RS232 Status Register100 Reserved101 Valve Control110 HV safety Signal Control111 P&T Sensors

UGBS Section Address

000 MV100 Register001 Open Time Register010 Curr. or Event Status Reg.011 Reserved100 Reserved101 Valve Control110 Reserved111 P&T Sensors

UGFV Section Address

000 PS Control Register001 Module 1&2010 Module 3&4011 Module 5&6100 Module 7&8101 Reserved110 Reserved111 Reserved

Pump control circuit is based on three switches

Pump energizing requires two different steps1) Pump connection to the power supply is

done using SW-12) Pump is energized using SW-2 (full speed)

or SW-3 (half speed)

Energized and Speed status of the valve are stored in the FPGA through the use of comparators monitoring the voltage applied to the pump and of ADC monitoring thesurged current

GND

+24

From FPGA

From FPGA SW-1

SW-2

R

SW-3

Part List:N-Mosfet SUB85N10 (ID = 85A, VDS = 100V)P-Mosfet SUB65N06 (ID = -65A, VDS = -60V)N-Mosfet Si4840DY (ID = 10A, VDS = 40V)Comparator LM23912 bits ADC AD7476

MV100 valve control circuit is based on two switches

Valve energizing requires two different steps1) Valve connection to the 24 V power supply

is done using SW-12) Valve is closed using SW-2

Energized status of the valve is stored in the FPGA throughthe use of a comparator (LM239) monitoring the voltage appliedto the valve

Mechanical status of the valve is stored in the FPGAusing the valve position switch signals (after debouncing)

Open time (miminum of 50 ms up to 30 seconds)is programmable by USCM

To implement the switch Vishay P-Mosfet and N-mosfet are used :

SUB85N10 (ID = 85A , VDS = 100V)SUB65P06 (ID = 65A , VDS = 60V)Si4840DY (ID = 10A , VDS = 40V)

GND

+24

LM239

MV100

To FPGA

From FPGA

From FPGA From “Cold” FPGA

From “Cold” FPGA

SW-1

SW-2

Flliper valve control circuit is based on 4 switches A +12

FV+

BGND

AB

OPEN Valve with positive pulseCLOSE Valve with negative pulseOpen Time MAX = 100 msClose Time MAX = 100 msCurrent = 150 mA

Part List:2 x Half Bridge Si4544 (ID = 6.5A, VDS = 30V)1 x 2N-Mosfet Si4966 (ID = 7A, VDS = 20V)

UGBS interface to BOX-S

Tasks:• open the valves • test the status of the valves• monitor pressure and temperature sensor • emergency open of safety valve without USCM intervention

Redundancy:• hot & cold (hot & hot will be evaluated against power budget) • no duplication of control circuits on the same board

UGBS

UGFV interface to manifold valves

Tasks:• open/close the valves under USCM command• open/close the valves under UGBC command• pressure sensor output signal multiplexing to the USCM ADC

input lines

Redundancy:• hot & cold (hot & hot will be evaluated against power budget) • no duplication of control circuits on the same board

UGFV-XX

UGM modules

• 82 pressure sensors (honeywell 26PC-C) arranged in 16 modules (14 with 5 p.s. and 2 with 6 p.s.)

• The typical output signal from the sensor (Out+ / Out-) is in the ±100 mV range (±15psi) and is conditioned and multiplexed to be connected to the UGSCM ADC lines (0 to 4.096 VDC)

GND+12 26PC-C

to USCM ADC-In

From others modules

Manifold module(6/5 pressure sensors)

UGM modulelocal to the sensors UGFV-xx board

in the UGE crateOut+

Out-

x6

x6x6

1:8

AD620

PA Sensor Response (input to segment)

1,5

2

2,5

3

3,5

4

4,5

0 0,5 1 1,5 2 2,5 3 3,5

Condition

Maximum Gain

Minimum Gainno flow normal flow 2 liter/hour

leakvacuum in segment

vacuum in Box C

PB Sensor Response (output from segment)(sensor polarity as on input)

1.5

2

2.5

3

3.5

4

4.5

0 0.5 1 1.5 2 2.5 3 3.5

Maximum Gain

Minimum Gainvacuum in Box C no flow normal flow 2 liter/hour

leak

vacuum in segment

UGM module

USCM

UGFV-AC

Backplane

ADCBUS(1:6)

ADCBUS(1:6)

UGFV ADC signals backplane

USCM’

UGFV-AC’

UGFV-BDADCBUS(1:6)

ADCBUS(1:6)UGFV-BD’

AIN(0:5)

AIN(8:13)

AIN(16:21)

AIN(24:29)

AIN(0:5)

AIN(8:13)

AIN(16:21)

AIN(24:29)

UGpd-Box

 

Power Supply Requirements

• Hot and Cold redundancy used

• 10 DC-DC Converters needed

Operating Voltage(V)

120

24

10.8

5

3.3

Normal Power(W)

<0.05

6

4.9

7.1

1

Peak Power(W)

< 0.05

80

18

9

2

DC-DC Converter

2x CAEN S9025

? LAMBDA or INTERPOINT ?

2x CAEN S9022

2x CAEN S9024

2x CAEN S9023

Total 19.05 109.05